tangxifan e6c896d583 now inout must be global port and I/O port so that it will appear in the top-level module		2020-04-08 16:54:08 -06:00
..
annotation	add exit codes to command execution in shell context	2020-04-08 16:18:05 -06:00
base	add exit codes to command execution in shell context	2020-04-08 16:18:05 -06:00
fabric	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
fpga_bitstream	relax asseration to allow AIB (non-I/O) blocks on the side of FPGA fabrics	2020-03-27 19:07:34 -06:00
fpga_sdc	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
fpga_verilog	improve directory creator to support same functionality as 'mkdir -p'	2020-04-08 12:55:09 -06:00
mux_lib	spot a bug in assigning rr_switch in tileable routing	2020-03-20 16:53:43 -06:00
repack	add test cases using shift registers	2020-04-07 15:09:10 -06:00
tile_direct	bug fixed in tile direct builder	2020-03-21 12:43:56 -06:00
utils	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
vpr_wrapper	add rr_segment binding to circuit model	2020-02-12 11:21:40 -07:00
ctag_src.sh	add ctags script to index openfpga source files	2020-01-24 10:15:16 -07:00
main.cpp	fix memory leakage in openfpga title	2020-04-07 16:14:41 -06:00