OpenFPGA/libs/librtlnumber/regression_tests/basic_regression_tests.csv

9.0 KiB

1#####################
2# Dr. Kenneth B. Kent (ken@unb.ca)
3# for the Reconfigurable Computing Research Lab at the
4#####################
5# truth test
6# type test
7# sign test
8# type conversion test
9# string test
10# replicate test
11# concat test
12# base conversions
13# Sign modifier
14# Simple Base 10 conversion
15# Reduction
16# bitwise
17# case equivalence
18# logical operation
19# shift operation
20# arithmetic
21# Ternary operations
22# Test Cases As-Per Verilog 2005 Specification:
23#9 ** 0.5 3.0 Real square root.
24#9.0 ** (1/2) 1.0 Integer division truncates exponent to zero.
25#-3.0 ** 2.0 9.0 Defined because real 2.0 is still integral value