OpenFPGA/vpr7_x2p/vpr/Circuits/fifo_1bit.blif

104 lines
2.6 KiB
Plaintext

# Benchmark "fifo_1bit" written by ABC on Wed Dec 12 14:34:26 2018
.model fifo_1bit
.inputs rst clk data_in
.outputs data_out
.latch n9 int_reg[0] re clk 0
.latch n14 int_reg[1] re clk 0
.latch n19 int_reg[2] re clk 0
.latch n24 int_reg[3] re clk 0
.latch n29 int_reg[4] re clk 0
.latch n34 int_reg[5] re clk 0
.latch n39 int_reg[6] re clk 0
.latch n44 int_reg[7] re clk 0
.latch n49 int_reg[8] re clk 0
.latch n54 int_reg[9] re clk 0
.latch n59 int_reg[10] re clk 0
.latch n64 int_reg[11] re clk 0
.latch n69 int_reg[12] re clk 0
.latch n74 int_reg[13] re clk 0
.latch n79 int_reg[14] re clk 0
.latch n84 int_reg[15] re clk 0
.latch n89 int_reg[16] re clk 0
.latch n94 int_reg[17] re clk 0
.latch n99 int_reg[18] re clk 0
.latch n104 int_reg[19] re clk 0
.latch n109 int_reg[20] re clk 0
.latch n114 int_reg[21] re clk 0
.latch n119 int_reg[22] re clk 0
.latch n124 int_reg[23] re clk 0
.latch n129 int_reg[24] re clk 0
.latch n134 int_reg[25] re clk 0
.latch n139 int_reg[26] re clk 0
.latch n144 int_reg[27] re clk 0
.latch n149 int_reg[28] re clk 0
.latch n154 int_reg[29] re clk 0
.latch n159 int_reg[30] re clk 0
.latch n164 data_out re clk 0
.names int_reg[10] rst n64
10 1
.names int_reg[11] rst n69
10 1
.names int_reg[12] rst n74
10 1
.names int_reg[13] rst n79
10 1
.names int_reg[14] rst n84
10 1
.names int_reg[15] rst n89
10 1
.names int_reg[16] rst n94
10 1
.names int_reg[17] rst n99
10 1
.names int_reg[18] rst n104
10 1
.names int_reg[19] rst n109
10 1
.names int_reg[20] rst n114
10 1
.names int_reg[21] rst n119
10 1
.names int_reg[22] rst n124
10 1
.names int_reg[23] rst n129
10 1
.names int_reg[24] rst n134
10 1
.names int_reg[25] rst n139
10 1
.names int_reg[26] rst n144
10 1
.names int_reg[27] rst n149
10 1
.names int_reg[28] rst n154
10 1
.names int_reg[29] rst n159
10 1
.names int_reg[30] rst n164
10 1
.names data_in rst n9
10 1
.names int_reg[0] rst n14
10 1
.names int_reg[1] rst n19
10 1
.names int_reg[2] rst n24
10 1
.names int_reg[3] rst n29
10 1
.names int_reg[4] rst n34
10 1
.names int_reg[5] rst n39
10 1
.names int_reg[6] rst n44
10 1
.names int_reg[7] rst n49
10 1
.names int_reg[8] rst n54
10 1
.names int_reg[9] rst n59
10 1
.end