OpenFPGA/vpr7_x2p/vpr/Circuits/fifo_1bit.act

68 lines
1.7 KiB
Plaintext

rst 0.001 0.206600
clk 0.486400 0.198400
data_in 0.5 0.2
int_reg[0] 0.257400 0.190800
int_reg[1] 0.202800 0.149200
int_reg[2] 0.160800 0.115200
int_reg[3] 0.130400 0.090800
int_reg[4] 0.106200 0.072000
int_reg[5] 0.085800 0.056400
int_reg[6] 0.070200 0.048000
int_reg[7] 0.055800 0.039200
int_reg[8] 0.043600 0.031600
int_reg[9] 0.033400 0.023200
int_reg[10] 0.026000 0.016800
int_reg[11] 0.021400 0.014800
int_reg[12] 0.016400 0.010000
int_reg[13] 0.013600 0.007600
int_reg[14] 0.011800 0.006400
int_reg[15] 0.010200 0.005600
int_reg[16] 0.008400 0.004800
int_reg[17] 0.006800 0.004400
int_reg[18] 0.005200 0.004000
int_reg[19] 0.003600 0.002800
int_reg[20] 0.002400 0.002000
int_reg[21] 0.001400 0.000800
int_reg[22] 0.001000 0.000400
int_reg[23] 0.000800 0.000400
int_reg[24] 0.000600 0.000400
int_reg[25] 0.000400 0.000400
int_reg[26] 0.000200 0.000400
int_reg[27] 0.000000 0.000000
int_reg[28] 0.000000 0.000000
int_reg[29] 0.000000 0.000000
int_reg[30] 0.000000 0.000000
data_out 0.000000 0.000000
n64 0.021400 0.003732
n69 0.016400 0.004289
n74 0.013600 0.004355
n79 0.011800 0.004449
n84 0.010200 0.004579
n89 0.008400 0.004751
n94 0.006800 0.004964
n99 0.005200 0.005218
n104 0.003600 0.005473
n109 0.002400 0.005561
n114 0.001400 0.005648
n119 0.001000 0.005609
n124 0.000800 0.005610
n129 0.000600 0.005652
n134 0.000400 0.005695
n139 0.000200 0.005737
n144 0.000000 0.005779
n149 0.000000 0.005738
n154 0.000000 0.005738
n159 0.000000 0.005738
n164 0.000000 0.005738
n9 0.257400 0.049974
n14 0.202800 0.087932
n19 0.160800 0.092067
n24 0.130400 0.094679
n29 0.106200 0.096468
n34 0.085800 0.097926
n39 0.070200 0.099152
n44 0.055800 0.000744
n49 0.043600 0.002005
n54 0.033400 0.003037
n59 0.026000 0.003481