OpenFPGA/openfpga_flow/benchmarks/micro_benchmark/counter4bit_2clock
tangxifan 9a906e787b [Benchmark] Add post-yosys .v file for counter 4-bit with dual clock 2021-01-13 15:43:31 -07:00
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counter4bit_2clock.act [Benchmark] Change multi-clock counter from 8-bit to 4-bit 2021-01-13 13:31:06 -07:00
counter4bit_2clock.blif [Benchmark] Change multi-clock counter from 8-bit to 4-bit 2021-01-13 13:31:06 -07:00
counter4bit_2clock.v [Benchmark] change the pin sequence of counter4bit_2clock to be easy for testbench generation 2021-01-13 15:38:44 -07:00
counter4bit_2clock_post_yosys.v [Benchmark] Add post-yosys .v file for counter 4-bit with dual clock 2021-01-13 15:43:31 -07:00
counter4bit_2clock_tb.v [Benchmark] Change multi-clock counter from 8-bit to 4-bit 2021-01-13 13:31:06 -07:00