OpenFPGA/openfpga_flow/regression_test_scripts
chungshien dd577e37e0
LUTRAM Support (#1595)
* BRAM preload data - generic way to extract data from design

* Add docs and support special __layout__ case

* Add test

* Fix warning

* Change none-fabric to non-fabric

* LUTRAM Support Phase 1

* Add Test

* Add more protocol checking to enable LUTRAM feature

* Move the config setting under config protocol

* Revert any changes

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Co-authored-by: chungshien-chai <chungshien.chai@gmail.com>
2024-04-19 14:46:38 -07:00
..
basic_reg_test.sh LUTRAM Support (#1595) 2024-04-19 14:46:38 -07:00
basic_reg_yosys_only_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_bitstream_reg_test.sh Support extracting data that is not affecting fabric bitstream (#1566) 2024-03-09 17:38:31 -08:00
fpga_sdc_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_spice_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
fpga_verilog_reg_test.sh [test] add new testcase 2023-11-13 14:11:34 -08:00
iwls_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
micro_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
quicklogic_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00
tcl_reg_test.sh [script] enable eval mode in tcl reg test 2022-12-02 12:07:27 -08:00
vtr_benchmark_reg_test.sh [test] now regression test script supports remove all run dir through command-line options 2022-05-22 13:15:39 +08:00