54 lines
2.7 KiB
C++
54 lines
2.7 KiB
C++
#ifndef BUILD_TOP_MODULE_MEMORY_BANK_H
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#define BUILD_TOP_MODULE_MEMORY_BANK_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <vector>
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#include <map>
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#include <array>
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#include "vtr_vector.h"
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#include "vtr_ndmatrix.h"
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#include "module_manager.h"
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#include "config_protocol.h"
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#include "circuit_library.h"
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#include "decoder_library.h"
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#include "memory_bank_shift_register_banks.h"
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#include "build_top_module_memory_utils.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void add_top_module_nets_cmos_ql_memory_bank_config_bus(ModuleManager& module_manager,
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DecoderLibrary& decoder_lib,
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MemoryBankShiftRegisterBanks& blwl_sr_banks,
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const ModuleId& top_module,
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const CircuitLibrary& circuit_lib,
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const ConfigProtocol& config_protocol,
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const TopModuleNumConfigBits& num_config_bits);
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void add_top_module_ql_memory_bank_sram_ports(ModuleManager& module_manager,
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const ModuleId& module_id,
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const CircuitLibrary& circuit_lib,
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const ConfigProtocol& config_protocol,
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const MemoryBankShiftRegisterBanks& blwl_sr_banks,
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const TopModuleNumConfigBits& num_config_bits);
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int load_top_module_shift_register_banks_from_fabric_key(const FabricKey& fabric_key,
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MemoryBankShiftRegisterBanks& blwl_sr_banks);
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void sync_memory_bank_shift_register_banks_with_config_protocol_settings(ModuleManager& module_manager,
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MemoryBankShiftRegisterBanks& blwl_sr_banks,
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const ConfigProtocol& config_protocol,
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const ModuleId& top_module,
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const CircuitLibrary& circuit_lib);
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} /* end namespace openfpga */
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#endif
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