OpenFPGA/openfpga
tangxifan cd50155e29 rename variables in lb router 2020-03-12 10:24:38 -06:00
..
src rename variables in lb router 2020-03-12 10:24:38 -06:00
test_blif add a microbenchmark `and_latch` to test LUTs in wired mode 2020-03-11 10:40:59 -06:00
test_openfpga_arch minor change in variable names in lb_router 2020-03-11 21:10:16 -06:00
test_script add a microbenchmark `and_latch` to test LUTs in wired mode 2020-03-11 10:40:59 -06:00
test_vpr_arch tileable rr_graph builder ready to debug 2020-03-06 16:18:45 -07:00
CMakeLists.txt add simulation ini file writer 2020-02-27 18:01:47 -07:00