1.1 KiB
1.1 KiB
Tutorial Introduction
OpenFPGA is an IP Verilog Generator allowing reliable and fast testing of homogeneous FPGA architectures.
Its main goal is to easily and efficiently generated a complete customizable FPGA and uses a semi-custom design flow.
In order to help you get in touch with the software, we provide few tutorials which are organized as follow:
- Building the tool and his dependencies
- Launching the flow and understand how it works
- Architecture modification
Folder Organization
OpenFPGA repository is organized as follow:
- abc: open source synthesys tool
- ace2: abc extension generating .act files
- ace2: abc extension generating activity files (.act)
- vpr7_x2p: sources of modified vpr
- yosys: opensource synthesys tool
- fpga_flow: scripts and dependencies to run the complete flow
Tips and Information
Some keywords will be used during in the tutorials:
- OPENFPGAPATHKEYWORD: refers to OpenFPGA folder full path