OpenFPGA/openfpga_flow
tangxifan 2def059b5b add standalone configuration protocol to pre config test cases 2020-06-11 19:31:12 -06:00
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OpenFPGAShellScripts add fast configuration option to fpga_verilog to speed up full testbench simulation 2020-06-11 19:31:12 -06:00
SpiceNetlists Moved spice and verilog netlist folder location 2019-08-17 01:49:49 -06:00
VerilogNetlists frame-based configuration protocol is working on k4n4 arch now. Spot bugs in iVerilog about negedge flip-flops 2020-06-11 19:31:11 -06:00
arch add arch file with spy pads 2020-04-22 12:56:09 -06:00
benchmarks bug fixed in routing_test.v. Deployed to regression tests 2020-06-11 19:31:01 -06:00
docs Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
misc Fixed modelsim include references 2020-06-11 19:28:13 -06:00
openfpga_arch add new architecture for standalone memory organization 2020-06-11 19:31:12 -06:00
scripts Added support for simulation setting file in the task flow 2020-06-11 19:28:13 -06:00
tasks add standalone configuration protocol to pre config test cases 2020-06-11 19:31:12 -06:00
tech Added Power Model Files 2019-08-19 18:55:23 -06:00
.gitignore Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00