tangxifan ad7422359d deploy compact constant values in Verilog codes		2020-06-11 19:31:13 -06:00
..
src	deploy compact constant values in Verilog codes	2020-06-11 19:31:13 -06:00
test_blif	add missing files for micro benchmarks	2020-03-20 11:08:55 -06:00
test_openfpga_arch	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
test_script	bug fix in pnr sdc grid writer for module paths in hierarchical view	2020-06-11 19:31:05 -06:00
test_vpr_arch	add arch file with spy pads	2020-04-22 12:56:09 -06:00
CMakeLists.txt	add simulation ini file writer	2020-02-27 18:01:47 -07:00