17 lines
336 B
Verilog
17 lines
336 B
Verilog
//-----------------------------------------------------
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// Design Name : mult_8x8
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// File Name : mult_8x8.v
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// Function : A 8-bit multiplier
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// Coder : Xifan Tang
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//-----------------------------------------------------
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module mult_8x8 (
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input [0:7] A,
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input [0:7] B,
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output [0:15] Y
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);
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assign Y = A * B;
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endmodule
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