OpenFPGA/openfpga_flow/openfpga_yosys_techlib
tangxifan 84edd41342 [test] fixed the bug in adder mapping 2023-06-20 17:09:31 -07:00
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k4_N4_tileable_frac_dsp16_40nm_cell_sim.v [arch] adding tech lib; 2023-01-24 15:22:34 -08:00
k4_N4_tileable_frac_dsp16_40nm_dsp_map.v [arch] adding tech lib; 2023-01-24 15:22:34 -08:00
k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_cell_sim.v
k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_dsp_map.v
k4_frac_N8_tileable_reset_softadder_register_scan_chain_frac_dsp16_nonLR_caravel_io_skywater130nm_cell_sim.v
k4_frac_N8_tileable_reset_softadder_register_scan_chain_frac_dsp16_nonLR_caravel_io_skywater130nm_dsp_map.v
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_40nm_bram.txt
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_40nm_bram_map.v
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_40nm_cell_sim.v
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_40nm_dsp_map.v
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_fracff_40nm_cell_sim.v
k6_frac_N10_tileable_adder_chain_dpram8K_dsp36_fracff_40nm_dff_map.v
k6_frac_N10_tileable_adder_chain_mem1K_40nm_bram.txt
k6_frac_N10_tileable_adder_chain_mem1K_40nm_bram_map.v
k6_frac_N10_tileable_adder_chain_mem1K_40nm_cell_sim.v
openfpga_adders_sim.v [test] fixed the bug in adder mapping 2023-06-20 17:09:31 -07:00
openfpga_arith_map.v [test] fixed the bug in adder mapping 2023-06-20 17:09:31 -07:00
openfpga_brams.txt
openfpga_brams_map.v
openfpga_brams_sim.v
openfpga_dff_map.v
openfpga_dff_sim.v