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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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7b18f7cd09
OpenFPGA
/
openfpga
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tangxifan
7b18f7cd09
now the auto select number of clocks in simulation is online
2020-02-29 13:29:16 -07:00
..
src
now the auto select number of clocks in simulation is online
2020-02-29 13:29:16 -07:00
test_blif
start debugging with micro benchmarks. Spot problem in local routing
2020-02-28 15:41:32 -07:00
test_openfpga_arch
bug fixed for io location mapping
2020-02-28 14:46:01 -07:00
test_script
now the auto select number of clocks in simulation is online
2020-02-29 13:29:16 -07:00
test_vpr_arch
start verification and bug fixing
2020-02-28 14:29:01 -07:00
CMakeLists.txt
add simulation ini file writer
2020-02-27 18:01:47 -07:00