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OpenFPGA/vpr7_x2p/vpr/SRC/fpga_spice/base
History
tangxifan 70751551b5 fix a bug in wired LUT support 2018-11-30 21:33:31 -07:00
..
fpga_spice_api.c rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_api.h rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_backannotate_utils.c support wired LUT in FPGA-SPICE and FPGA-Verilog 2018-11-15 15:57:49 -07:00
fpga_spice_backannotate_utils.h rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_bitstream.c rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_bitstream.h rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_globals.c rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_globals.h support wired LUT in FPGA-SPICE and FPGA-Verilog 2018-11-15 15:57:49 -07:00
fpga_spice_setup.c rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_setup.h rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
fpga_spice_utils.c fix a bug in wired LUT support 2018-11-30 21:33:31 -07:00
fpga_spice_utils.h fix bugs for wired LUTs 2018-11-27 12:46:30 -07:00
quicksort.c rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
quicksort.h rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00