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OpenFPGA/vpr7_x2p/vpr/SRC/fpga_spice
History
tangxifan 70751551b5 fix a bug in wired LUT support 2018-11-30 21:33:31 -07:00
..
base fix a bug in wired LUT support 2018-11-30 21:33:31 -07:00
clb_pin_remap rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
spice fix bugs for wired LUTs 2018-11-27 12:46:30 -07:00
verilog fix bugs for wired LUTs 2018-11-27 12:46:30 -07:00