1143 lines
22 KiB
Plaintext
1143 lines
22 KiB
Plaintext
# Benchmark "ss_pcm" written by ABC on Mon Aug 29 15:33:12 2005
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.model ss_pcm
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.inputs clk rst pcm_clk_i pcm_sync_i pcm_din_i re_i ssel[0] ssel[1] ssel[2] \
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din_i[0] din_i[1] din_i[2] din_i[3] din_i[4] din_i[5] din_i[6] din_i[7] \
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we_i[0] we_i[1]
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.outputs pcm_dout_o dout_o[0] dout_o[1] dout_o[2] dout_o[3] dout_o[4] \
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dout_o[5] dout_o[6] dout_o[7]
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.latch \tx_hold_reg_reg[15]_in \tx_hold_reg_reg[15] 2
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.latch \tx_hold_reg_reg[1]_in \tx_hold_reg_reg[1] 2
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.latch \tx_hold_reg_reg[2]_in \tx_hold_reg_reg[2] 2
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.latch \tx_hold_reg_reg[3]_in \tx_hold_reg_reg[3] 2
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.latch \tx_hold_reg_reg[4]_in \tx_hold_reg_reg[4] 2
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.latch \tx_hold_reg_reg[5]_in \tx_hold_reg_reg[5] 2
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.latch \tx_hold_reg_reg[6]_in \tx_hold_reg_reg[6] 2
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.latch \tx_hold_reg_reg[7]_in \tx_hold_reg_reg[7] 2
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.latch \tx_hold_reg_reg[8]_in \tx_hold_reg_reg[8] 2
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.latch \tx_hold_reg_reg[9]_in \tx_hold_reg_reg[9] 2
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.latch \tx_hold_reg_reg[11]_in \tx_hold_reg_reg[11] 2
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.latch \tx_hold_reg_reg[12]_in \tx_hold_reg_reg[12] 2
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.latch \tx_hold_reg_reg[13]_in \tx_hold_reg_reg[13] 2
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.latch \tx_hold_reg_reg[14]_in \tx_hold_reg_reg[14] 2
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.latch \tx_hold_reg_reg[0]_in \tx_hold_reg_reg[0] 2
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.latch tx_go_reg_in tx_go_reg 2
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.latch \tx_hold_reg_reg[10]_in \tx_hold_reg_reg[10] 2
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.latch \rx_reg_reg[13]_in \rx_reg_reg[13] 2
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.latch \rx_reg_reg[14]_in \rx_reg_reg[14] 2
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.latch \rx_reg_reg[15]_in \rx_reg_reg[15] 2
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.latch \rx_reg_reg[1]_in \rx_reg_reg[1] 2
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.latch \rx_reg_reg[2]_in \rx_reg_reg[2] 2
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.latch \rx_reg_reg[3]_in \rx_reg_reg[3] 2
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.latch \rx_reg_reg[4]_in \rx_reg_reg[4] 2
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.latch \rx_reg_reg[5]_in \rx_reg_reg[5] 2
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.latch \rx_reg_reg[6]_in \rx_reg_reg[6] 2
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.latch \rx_reg_reg[7]_in \rx_reg_reg[7] 2
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.latch \rx_reg_reg[8]_in \rx_reg_reg[8] 2
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.latch \rx_reg_reg[9]_in \rx_reg_reg[9] 2
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.latch \rx_reg_reg[0]_in \rx_reg_reg[0] 2
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.latch \rx_reg_reg[12]_in \rx_reg_reg[12] 2
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.latch \rx_reg_reg[10]_in \rx_reg_reg[10] 2
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.latch \rx_reg_reg[11]_in \rx_reg_reg[11] 2
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.latch \tx_cnt_reg[3]_in \tx_cnt_reg[3] 2
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.latch \tx_cnt_reg[2]_in \tx_cnt_reg[2] 2
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.latch \tx_cnt_reg[0]_in \tx_cnt_reg[0] 2
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.latch \tx_cnt_reg[1]_in \tx_cnt_reg[1] 2
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.latch \rx_hold_reg_reg[8]_in \rx_hold_reg_reg[8] 2
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.latch \rx_hold_reg_reg[10]_in \rx_hold_reg_reg[10] 2
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.latch \rx_hold_reg_reg[0]_in \rx_hold_reg_reg[0] 2
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.latch \rx_hold_reg_reg[11]_in \rx_hold_reg_reg[11] 2
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.latch \rx_hold_reg_reg[12]_in \rx_hold_reg_reg[12] 2
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.latch \rx_hold_reg_reg[14]_in \rx_hold_reg_reg[14] 2
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.latch \rx_hold_reg_reg[15]_in \rx_hold_reg_reg[15] 2
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.latch \rx_hold_reg_reg[1]_in \rx_hold_reg_reg[1] 2
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.latch \rx_hold_reg_reg[4]_in \rx_hold_reg_reg[4] 2
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.latch \rx_hold_reg_reg[5]_in \rx_hold_reg_reg[5] 2
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.latch \rx_hold_reg_reg[6]_in \rx_hold_reg_reg[6] 2
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.latch \rx_hold_reg_reg[9]_in \rx_hold_reg_reg[9] 2
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.latch \rx_hold_reg_reg[2]_in \rx_hold_reg_reg[2] 2
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.latch \rx_hold_reg_reg[7]_in \rx_hold_reg_reg[7] 2
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.latch \rx_hold_reg_reg[13]_in \rx_hold_reg_reg[13] 2
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.latch \rx_hold_reg_reg[3]_in \rx_hold_reg_reg[3] 2
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.latch tx_go_r1_reg_in tx_go_r1_reg 2
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.latch \psa_reg[2]_in \psa_reg[2] 2
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.latch \psa_reg[5]_in \psa_reg[5] 2
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.latch \psa_reg[1]_in \psa_reg[1] 2
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.latch \psa_reg[7]_in \psa_reg[7] 2
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.latch \psa_reg[6]_in \psa_reg[6] 2
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.latch \psa_reg[0]_in \psa_reg[0] 2
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.latch \psa_reg[3]_in \psa_reg[3] 2
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.latch \psa_reg[4]_in \psa_reg[4] 2
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.latch psync_reg_in psync_reg 2
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.latch pcm_sync_r1_reg_in pcm_sync_r1_reg 2
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.latch rxd_t_reg_in rxd_t_reg 2
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.latch pcm_sync_r3_reg_in pcm_sync_r3_reg 2
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.latch pcm_sync_r2_reg_in pcm_sync_r2_reg 2
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.latch pclk_r_reg_in pclk_r_reg 2
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.latch \tx_hold_byte_l_reg[5]_in \tx_hold_byte_l_reg[5] 2
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.latch \tx_hold_byte_h_reg[7]_in \tx_hold_byte_h_reg[7] 2
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.latch \tx_hold_byte_h_reg[4]_in \tx_hold_byte_h_reg[4] 2
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.latch \tx_hold_byte_h_reg[6]_in \tx_hold_byte_h_reg[6] 2
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.latch \tx_hold_byte_h_reg[1]_in \tx_hold_byte_h_reg[1] 2
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.latch \tx_hold_byte_h_reg[2]_in \tx_hold_byte_h_reg[2] 2
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.latch \tx_hold_byte_h_reg[3]_in \tx_hold_byte_h_reg[3] 2
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.latch \tx_hold_byte_h_reg[5]_in \tx_hold_byte_h_reg[5] 2
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.latch \tx_hold_byte_l_reg[1]_in \tx_hold_byte_l_reg[1] 2
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.latch \tx_hold_byte_l_reg[2]_in \tx_hold_byte_l_reg[2] 2
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.latch \tx_hold_byte_l_reg[4]_in \tx_hold_byte_l_reg[4] 2
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.latch \tx_hold_byte_l_reg[7]_in \tx_hold_byte_l_reg[7] 2
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.latch \tx_hold_byte_h_reg[0]_in \tx_hold_byte_h_reg[0] 2
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.latch \tx_hold_byte_l_reg[6]_in \tx_hold_byte_l_reg[6] 2
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.latch \tx_hold_byte_l_reg[3]_in \tx_hold_byte_l_reg[3] 2
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.latch \tx_hold_byte_l_reg[0]_in \tx_hold_byte_l_reg[0] 2
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.latch pclk_s_reg_in pclk_s_reg 2
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.latch rxd_reg_in rxd_reg 2
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.latch pclk_t_reg_in pclk_t_reg 2
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.names [115]
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0
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.names [116]
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1
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.names \tx_hold_reg_reg[15] pcm_dout_o
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1 1
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.names \tx_hold_reg_reg[1] [118]
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0 1
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.names \tx_hold_reg_reg[2] [119]
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0 1
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.names \tx_hold_reg_reg[3] [120]
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0 1
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.names \tx_hold_reg_reg[4] [121]
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0 1
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.names \tx_hold_reg_reg[5] [122]
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0 1
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.names \tx_hold_reg_reg[6] [123]
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0 1
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.names \tx_hold_reg_reg[7] [124]
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0 1
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.names \tx_hold_reg_reg[8] [125]
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0 1
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.names \tx_hold_reg_reg[9] [126]
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0 1
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.names \tx_hold_reg_reg[11] [127]
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0 1
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.names \tx_hold_reg_reg[12] [128]
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0 1
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.names \tx_hold_reg_reg[13] [129]
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0 1
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.names \tx_hold_reg_reg[14] [130]
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0 1
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.names \tx_hold_reg_reg[0] [131]
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1 1
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.names tx_go_reg [132]
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1 1
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.names \tx_hold_reg_reg[10] [133]
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1 1
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.names [221] [207] [480] \tx_hold_reg_reg[1]_in
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11- 0
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--1 0
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.names [236] [190] [481] \tx_hold_reg_reg[14]_in
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11- 0
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--1 0
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.names [237] [191] [481] \tx_hold_reg_reg[15]_in
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11- 0
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--1 0
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.names [168] [169] \tx_hold_reg_reg[0]_in
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11 0
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.names [224] [210] [481] \tx_hold_reg_reg[4]_in
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11- 0
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--1 0
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.names [225] [212] [480] \tx_hold_reg_reg[5]_in
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11- 0
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--1 0
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.names [226] [213] [476] \tx_hold_reg_reg[6]_in
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11- 0
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--1 0
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.names [227] [215] [478] \tx_hold_reg_reg[7]_in
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11- 0
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--1 0
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.names \rx_reg_reg[13] [142]
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0 1
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.names \rx_reg_reg[14] [143]
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0 1
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.names \rx_reg_reg[15] [144]
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0 1
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.names \rx_reg_reg[1] [145]
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0 1
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.names \rx_reg_reg[2] [146]
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0 1
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.names \rx_reg_reg[3] [147]
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0 1
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.names \rx_reg_reg[4] [148]
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0 1
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.names \rx_reg_reg[5] [149]
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0 1
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.names \rx_reg_reg[6] [150]
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0 1
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.names \rx_reg_reg[7] [151]
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0 1
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.names \rx_reg_reg[8] [152]
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0 1
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.names \rx_reg_reg[9] [153]
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0 1
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.names \rx_reg_reg[0] [154]
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0 1
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.names \rx_reg_reg[12] [155]
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0 1
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.names \rx_reg_reg[10] [156]
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0 1
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.names [228] [216] [480] \tx_hold_reg_reg[8]_in
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11- 0
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--1 0
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.names \rx_reg_reg[11] [158]
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0 1
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.names [229] [217] [574] \tx_hold_reg_reg[9]_in
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11- 0
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--1 0
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.names [222] [208] [481] \tx_hold_reg_reg[2]_in
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11- 0
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--1 0
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.names [223] [209] [480] \tx_hold_reg_reg[3]_in
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11- 0
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--1 0
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.names [233] [218] [478] \tx_hold_reg_reg[11]_in
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11- 0
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--1 0
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.names [234] [219] [476] \tx_hold_reg_reg[12]_in
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11- 0
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--1 0
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.names [235] [189] [478] \tx_hold_reg_reg[13]_in
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11- 0
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--1 0
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.names [414] [193] tx_go_reg_in
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00 0
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.names \tx_cnt_reg[3] [166]
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1 1
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.names [232] [238] [478] \tx_hold_reg_reg[10]_in
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11- 0
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--1 0
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.names [230] [441] [168]
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11 0
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.names [131] rst [303] [576] [169]
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1111 0
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.names \tx_cnt_reg[2] [170]
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1 1
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.names \tx_cnt_reg[0] [171]
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1 1
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.names \tx_cnt_reg[1] [172]
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1 1
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.names [273] [257] [477] \rx_reg_reg[14]_in
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11- 0
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--1 0
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.names [277] [261] [475] \rx_reg_reg[3]_in
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11- 0
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--1 0
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.names [272] [256] [475] \rx_reg_reg[13]_in
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11- 0
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--1 0
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.names [274] [258] [574] \rx_reg_reg[15]_in
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11- 0
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--1 0
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.names [275] [259] [574] \rx_reg_reg[1]_in
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11- 0
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--1 0
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.names [276] [260] [474] \rx_reg_reg[2]_in
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11- 0
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--1 0
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.names [279] [263] [474] \rx_reg_reg[5]_in
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11- 0
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--1 0
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.names [280] [264] [477] \rx_reg_reg[6]_in
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11- 0
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--1 0
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.names [281] [265] [474] \rx_reg_reg[7]_in
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11- 0
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--1 0
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.names [282] [266] [474] \rx_reg_reg[8]_in
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11- 0
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--1 0
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.names [283] [267] [476] \rx_reg_reg[9]_in
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11- 0
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--1 0
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.names [284] [268] [476] \rx_reg_reg[0]_in
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11- 0
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--1 0
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.names [278] [262] [477] \rx_reg_reg[4]_in
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11- 0
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--1 0
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.names [285] [269] [475] \rx_reg_reg[10]_in
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11- 0
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--1 0
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.names [286] [270] [475] \rx_reg_reg[11]_in
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11- 0
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--1 0
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.names [271] [255] [477] \rx_reg_reg[12]_in
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11- 0
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--1 0
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.names [298] [303] [189]
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11 0
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.names [300] [303] [190]
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11 0
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.names [293] [303] [191]
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11 0
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.names \rx_hold_reg_reg[8] [192]
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0 1
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.names [327] [303] [544] [193]
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11- 0
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--1 0
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.names \rx_hold_reg_reg[10] [194]
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0 1
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.names \rx_hold_reg_reg[0] [195]
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0 1
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.names \rx_hold_reg_reg[11] [196]
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0 1
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.names \rx_hold_reg_reg[12] [197]
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0 1
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.names \rx_hold_reg_reg[14] [198]
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0 1
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.names \rx_hold_reg_reg[15] [199]
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0 1
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.names \rx_hold_reg_reg[1] [200]
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0 1
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.names \rx_hold_reg_reg[4] [201]
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0 1
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.names \rx_hold_reg_reg[5] [202]
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0 1
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.names \rx_hold_reg_reg[6] [203]
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0 1
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.names \rx_hold_reg_reg[9] [204]
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0 1
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.names \rx_hold_reg_reg[2] [205]
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0 1
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.names \rx_hold_reg_reg[7] [206]
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0 1
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.names [287] [303] [207]
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11 0
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.names [299] [303] [208]
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11 0
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.names [289] [303] [209]
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11 0
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.names [301] [303] [210]
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11 0
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.names \rx_hold_reg_reg[13] [211]
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0 1
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.names [290] [303] [212]
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11 0
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.names [294] [303] [213]
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11 0
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.names \rx_hold_reg_reg[3] [214]
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0 1
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.names [291] [303] [215]
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11 0
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.names [297] [303] [216]
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11 0
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.names [288] [303] [217]
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11 0
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.names [295] [303] [218]
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11 0
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.names [296] [303] [219]
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11 0
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.names [324] [365] [544] \tx_cnt_reg[1]_in
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11- 0
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--1 0
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.names [499] [303] [221]
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00 0
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.names [527] [303] [222]
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00 0
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.names [500] [303] [223]
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00 0
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.names [510] [303] [224]
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00 0
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.names [511] [303] [225]
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00 0
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.names [534] [303] [226]
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00 0
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.names [529] [303] [227]
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00 0
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.names [501] [303] [228]
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00 0
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.names [303] [518] [229]
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00 0
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.names [574] [303] [230]
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00 1
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.names [325] [340] [544] \tx_cnt_reg[2]_in
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11- 0
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--1 0
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.names [528] [303] [232]
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00 0
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.names [509] [303] [233]
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00 0
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.names [557] [303] [234]
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00 0
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.names [539] [303] [235]
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00 0
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.names [553] [303] [236]
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00 0
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.names [562] [303] [237]
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00 0
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.names [313] [388] [303] [238]
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00- 1
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--0 1
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.names [323] [376] [544] \tx_cnt_reg[0]_in
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11- 0
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--1 0
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.names [373] [342] [478] \rx_hold_reg_reg[10]_in
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11- 0
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--1 0
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.names [374] [343] [479] \rx_hold_reg_reg[11]_in
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11- 0
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--1 0
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.names [375] [344] [479] \rx_hold_reg_reg[12]_in
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11- 0
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--1 0
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.names [377] [345] [479] \rx_hold_reg_reg[13]_in
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11- 0
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--1 0
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.names [378] [346] [479] \rx_hold_reg_reg[14]_in
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11- 0
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--1 0
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.names [379] [347] [476] \rx_hold_reg_reg[15]_in
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11- 0
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--1 0
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.names [380] [348] [478] \rx_hold_reg_reg[1]_in
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1 1
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1-1 1
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|
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|
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|
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|
|
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|
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|
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|
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|
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|
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|
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00- 1
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00- 1
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11 0
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|
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1-1 1
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1-1 1
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01- 1
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1-1 1
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1-1 1
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1-1 1
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1-1 1
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1-1 1
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|
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|
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00- 1
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|
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|
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|
01- 1
|
|
1-1 1
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|
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01- 1
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1-1 1
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|
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01- 1
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1-1 1
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|
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01- 1
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1-1 1
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1-1 1
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1 1
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0 1
|
|
.names rst [481]
|
|
0 1
|
|
.names din_i[3] we_i[0] [482]
|
|
11 0
|
|
.names we_i[1] din_i[5] [483]
|
|
11 0
|
|
.names din_i[7] we_i[0] [484]
|
|
11 0
|
|
.names we_i[1] din_i[7] [485]
|
|
11 0
|
|
.names we_i[1] din_i[4] [486]
|
|
11 0
|
|
.names we_i[1] din_i[2] [487]
|
|
11 0
|
|
.names we_i[1] din_i[1] [488]
|
|
11 0
|
|
.names we_i[1] din_i[3] [489]
|
|
11 0
|
|
.names din_i[5] we_i[0] [490]
|
|
11 0
|
|
.names din_i[6] we_i[0] [491]
|
|
11 0
|
|
.names din_i[1] we_i[0] [492]
|
|
11 0
|
|
.names din_i[2] we_i[0] [493]
|
|
11 0
|
|
.names we_i[1] din_i[0] [494]
|
|
11 0
|
|
.names we_i[1] din_i[6] [495]
|
|
11 0
|
|
.names [586] [496]
|
|
0 1
|
|
.names din_i[4] we_i[0] [497]
|
|
11 0
|
|
.names pclk_t_reg pclk_s_reg_in
|
|
1 1
|
|
.names [431] [499]
|
|
0 1
|
|
.names [437] [500]
|
|
0 1
|
|
.names [435] [501]
|
|
0 1
|
|
.names [156] [502]
|
|
0 1
|
|
.names [123] [503]
|
|
0 1
|
|
.names [142] [504]
|
|
0 1
|
|
.names [124] [505]
|
|
0 1
|
|
.names [130] [506]
|
|
0 1
|
|
.names [125] [507]
|
|
0 1
|
|
.names [153] [508]
|
|
0 1
|
|
.names [429] [509]
|
|
0 1
|
|
.names [433] [510]
|
|
0 1
|
|
.names [421] [511]
|
|
0 1
|
|
.names [292] [512]
|
|
0 1
|
|
.names [121] [513]
|
|
0 1
|
|
.names [144] [514]
|
|
0 1
|
|
.names [128] [515]
|
|
0 1
|
|
.names [143] [516]
|
|
0 1
|
|
.names [155] [517]
|
|
0 1
|
|
.names [427] [518]
|
|
0 1
|
|
.names [122] [519]
|
|
0 1
|
|
.names [149] [520]
|
|
0 1
|
|
.names [201] [521]
|
|
0 1
|
|
.names [214] [522]
|
|
0 1
|
|
.names [127] [523]
|
|
0 1
|
|
.names [339] [524]
|
|
0 1
|
|
.names [150] [525]
|
|
0 1
|
|
.names [146] [526]
|
|
0 1
|
|
.names [432] [527]
|
|
0 1
|
|
.names [428] [528]
|
|
0 1
|
|
.names [434] [529]
|
|
0 1
|
|
.names [133] [530]
|
|
0 1
|
|
.names [145] [531]
|
|
0 1
|
|
.names [148] [532]
|
|
0 1
|
|
.names [151] [533]
|
|
0 1
|
|
.names [436] [534]
|
|
0 1
|
|
.names [202] [535]
|
|
0 1
|
|
.names [196] [536]
|
|
0 1
|
|
.names [152] [537]
|
|
0 1
|
|
.names [147] [538]
|
|
0 1
|
|
.names [430] [539]
|
|
0 1
|
|
.names [154] [540]
|
|
0 1
|
|
.names [119] [541]
|
|
0 1
|
|
.names [171] [542]
|
|
0 1
|
|
.names [194] [543]
|
|
0 1
|
|
.names rst [544]
|
|
0 1
|
|
.names [129] [545]
|
|
0 1
|
|
.names [204] [546]
|
|
0 1
|
|
.names [203] [547]
|
|
0 1
|
|
.names [118] [548]
|
|
0 1
|
|
.names [120] [549]
|
|
0 1
|
|
.names [211] [550]
|
|
0 1
|
|
.names [205] [551]
|
|
0 1
|
|
.names [200] [552]
|
|
0 1
|
|
.names [426] [553]
|
|
0 1
|
|
.names [158] [554]
|
|
0 1
|
|
.names [198] [555]
|
|
0 1
|
|
.names [341] rxd_reg_in
|
|
0 1
|
|
.names [425] [557]
|
|
0 1
|
|
.names [199] [558]
|
|
0 1
|
|
.names [192] [559]
|
|
0 1
|
|
.names [195] [560]
|
|
0 1
|
|
.names [172] [561]
|
|
0 1
|
|
.names [424] [562]
|
|
0 1
|
|
.names [206] [563]
|
|
0 1
|
|
.names [197] [564]
|
|
0 1
|
|
.names [126] [565]
|
|
0 1
|
|
.names [567] [566]
|
|
0 1
|
|
.names [568] [567]
|
|
1 1
|
|
.names [569] [568]
|
|
0 1
|
|
.names [585] [443] [569]
|
|
11 0
|
|
.names [572] [570]
|
|
0 1
|
|
.names [572] [571]
|
|
0 1
|
|
.names [581] [572]
|
|
0 1
|
|
.names [574] [575] \tx_cnt_reg[3]_in
|
|
00 1
|
|
.names rst [574]
|
|
0 1
|
|
.names [166] [576] [579] [575]
|
|
11- 0
|
|
--1 0
|
|
.names [577] [576]
|
|
0 1
|
|
.names [578] [577]
|
|
0 1
|
|
.names [496] [568] [578]
|
|
11 0
|
|
.names [417] [576] [579]
|
|
00 1
|
|
.names [568] [496] [580]
|
|
11 0
|
|
.names [586] [584] [581]
|
|
00 1
|
|
.names [583] [586] [292] [582]
|
|
111 0
|
|
.names [584] [583]
|
|
0 1
|
|
.names [585] [443] [584]
|
|
11 0
|
|
.names [416] [585]
|
|
0 1
|
|
.names [132] [586]
|
|
0 1
|
|
.names pcm_clk_i pclk_t_reg_in
|
|
1 1
|
|
.end
|