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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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5d41cc6d23
OpenFPGA
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openfpga_flow
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openfpga_cell_library
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tangxifan
c036c87d6d
[HDL] Bug fix in the GP output pad
2020-11-02 18:37:53 -07:00
..
spice
[Architecture] Reorganize the cell netlists and update architecture files accordingly
2020-09-25 11:55:28 -06:00
spice_testbench
[Architecture] Reorganize the cell netlists and update architecture files accordingly
2020-09-25 11:55:28 -06:00
verilog
[HDL] Bug fix in the GP output pad
2020-11-02 18:37:53 -07:00
verilog_testbench
[Architecture] Reorganize the cell netlists and update architecture files accordingly
2020-09-25 11:55:28 -06:00