tangxifan 9832722056 [test] now add QuickLogic memory bank to fpga bitstream regression tests		2022-05-25 11:42:32 +08:00
..
configuration_chain	[test] move generate_bitstream to another directory. Ready to test generate bitstream across different configuration protocols	2022-05-25 11:19:49 +08:00
ql_memory_bank_shift_register	[test] now add QuickLogic memory bank to fpga bitstream regression tests	2022-05-25 11:42:32 +08:00