OpenFPGA/openfpga_flow/tasks/fpga_verilog/dsp
tangxifan 824a03bdca [Flow] Patch new test case 2022-01-02 20:20:36 -08:00
..
multi_mode_mult_16x16/config [Test] Update test settings for architecture with fracturable DSP blocks 2021-04-24 15:16:50 -06:00
single_mode_mult_8x8/config [Test] Deploy new mac benchmarks to tests 2021-04-23 20:44:14 -06:00
single_mode_mult_8x8_reg/config [Flow] Patch new test case 2022-01-02 20:20:36 -08:00
wide_multi_mode_mult_16x16/config [Test] Added a test for the example architecture with 2x2 DSP blocks 2021-04-26 16:28:43 -06:00