OpenFPGA/openfpga_flow/openfpga_arch
tangxifan 23aef96d3a add behavioral verilog test case to Travis CI 2020-04-12 19:55:47 -06:00
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k6_N10_40nm_openfpga.xml update arch in openfpga_flow 2020-04-11 18:00:37 -06:00
k6_frac_N10_40nm_openfpga.xml update arch in openfpga_flow 2020-04-11 18:00:37 -06:00
k6_frac_N10_adder_chain_40nm_openfpga.xml update arch in openfpga_flow 2020-04-11 18:00:37 -06:00
k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml add test case of BRAM to Travis CI 2020-04-12 14:27:05 -06:00
k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml try to add aib test case. bug found 2020-04-12 14:54:45 -06:00
k6_frac_N10_adder_column_chain_40nm_openfpga.xml add more testing architecture to openfpga_flow 2020-04-11 18:01:09 -06:00
k6_frac_N10_adder_register_chain_40nm_openfpga.xml add more testing architecture to openfpga_flow 2020-04-11 18:01:09 -06:00
k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml add register chain and scan chain to Travis CI 2020-04-12 15:28:22 -06:00
k6_frac_N10_behavioral_40nm_openfpga.xml add behavioral verilog test case to Travis CI 2020-04-12 19:55:47 -06:00
k6_frac_N10_spyio_40nm_openfpga.xml update arch in openfpga_flow 2020-04-11 18:00:37 -06:00
k6_frac_N10_stdcell_mux_40nm_openfpga.xml add test cases on different routing multiplexer circuit designs to Travis CI 2020-04-12 15:39:45 -06:00
k6_frac_N10_tree_mux_40nm_openfpga.xml add more testing architecture to openfpga_flow 2020-04-11 18:01:09 -06:00