tangxifan 57adf97fd4 [test] fixed some bugs in clock arch		2024-08-02 18:34:59 -07:00
..
bus_group	…
clock_network	[test] fixed some bugs in clock arch	2024-08-02 18:34:59 -07:00
custom_fabric_netlist_location/config	…
explicit_multi_verilog_files/config	…
fabric_key	[test] deploy new tests	2023-07-08 21:52:16 -07:00
fixed_device_support/config	…
fixed_simulation_settings	…
full_testbench	LUTRAM Support (#1595)	2024-04-19 14:46:38 -07:00
generate_fabric	…
generate_template_testbench/config	[test] add a new test case to validate the new feature	2023-11-02 21:08:36 -07:00
generate_testbench/config	…
global_tile_ports	[test] fixed a bug	2024-07-08 22:04:40 -07:00
group_config_block	[core] ad a new test case	2023-10-06 18:31:54 -07:00
io_constraints	…
k4_series	[test] fixed a bug on ecb support	2024-07-07 14:00:11 -07:00
mock_wrapper	…
module_naming	[test] add a new test to validate clock network on module named by index	2024-07-30 14:06:53 -07:00
no_time_stamp	[test] update golden outputs	2024-07-08 23:24:16 -07:00
preconfig_testbench	…
preload_rr_graph	[test] add new tests to verify rr graph preloading in two file formats	2024-05-09 23:10:45 -07:00
source_command	…
tile_organization	[test] add a new test to validate that pb_pin fix is now compatible with perimeter cb	2024-08-02 17:24:44 -07:00
verific_test/config	…
vpr_standalone/config	…
write_fabric_pin_phy_loc	[test] add new testcases to validate options of write_fabric_pin_physical_location	2024-04-11 15:06:50 -07:00
write_gsb	…
yosys_only/config	…