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OpenFPGA/vpr7_x2p/libarchfpga/SRC
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AurelienUoU 19ccbce9d0 Rename option to use circuit_model rather than spice_model 2019-07-12 16:18:28 -06:00
..
fpga_spice_include updated bitstream to use new RRSwitchBlock as well as the report timing engine 2019-05-24 12:54:10 -06:00
include add option to compact tileable routing arch 2019-07-04 17:13:34 -06:00
ReadLine.c update Makefile t 2019-05-03 11:48:41 -06:00
ezxml.c update Makefile t 2019-05-03 11:48:41 -06:00
linkedlist.c update Makefile t 2019-05-03 11:48:41 -06:00
main.c update Makefile t 2019-05-03 11:48:41 -06:00
read_xml_arch_file.c Rename option to use circuit_model rather than spice_model 2019-07-12 16:18:28 -06:00
read_xml_mrfpga.c update Makefile t 2019-05-03 11:48:41 -06:00
read_xml_spice.c Rename option to use circuit_model rather than spice_model 2019-07-12 16:18:28 -06:00
read_xml_spice_util.c update Makefile t 2019-05-03 11:48:41 -06:00
read_xml_util.c update Makefile t 2019-05-03 11:48:41 -06:00
sides.cpp revert string to sprintf 2019-06-07 20:20:41 -06:00
util.c update Makefile t 2019-05-03 11:48:41 -06:00