173 lines
11 KiB
Plaintext
173 lines
11 KiB
Plaintext
----------------------------------- Summary ------------------------------------
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Circuit: /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/benchmarks/Blif/Test_Modes/test_modes
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Architecture: k6_N10_sram_chain_HC_template.xml
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Technology (nm): 45
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Voltage: 0.90
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Temperature: 85
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Critical Path: 5.8141e-09
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Size of FPGA: 2 x 2
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Channel Width: 200
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----------------------------------- Warnings -----------------------------------
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No transistor counter function for BLIF model: .frac_lut6
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No transistor counter function for BLIF model: .subckt adder
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No transistor counter function for BLIF model: .subckt shift
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Attempted to search for a transistor with a capacitance smaller than the smallest in the technology file.
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No dynamic power defined for BLIF model: .subckt adder
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No leakage power defined for BLIF model: .subckt adder
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No dynamic power defined for BLIF model: .frac_lut6
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No leakage power defined for BLIF model: .frac_lut6
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No dynamic power defined for BLIF model: .subckt shift
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No leakage power defined for BLIF model: .subckt shift
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------------------------------- Power Breakdown --------------------------------
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Component Power (W) %-Total %-Dynamic Method
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Total 0.0002701 1 0.7897
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Routing 0.0001289 0.4773 0.7668
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Switch Box 2.212e-05 0.08191 0
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Connection Box 0.0001068 0.3954 0.9256
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Global Wires 0 0 -nan
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PB Types 8.066e-05 0.2986 0.6884
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Primitives 4.913e-05 0.1819 0.8837
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Interc Structures 8.866e-06 0.03283 0.5489
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Buffers and Wires 2.266e-05 0.08389 0.3197
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Other Estimation Methods 0 0 -nan
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Clock 6.051e-05 0.224 0.9736
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---------------------------- Power Breakdown by PB -----------------------------
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This sections provides a detailed breakdown of power usage by PB (physical
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block). For each PB, the power is listed, which is the sum power of all
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instances of the block. It also indicates its percentage of total power (entire
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FPGA), as well as the percentage of its power that is dynamic (vs. static). It
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also indicates the method used for power estimation.
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The data includes:
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Modes: When a pb contains multiple modes, each mode is listed, with
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its power statistics.
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Bufs/Wires: Power of all local buffers and local wire switching
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(transistor-level estimation only).
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Interc: Power of local interconnect multiplexers (transistor-
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level estimation only)
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Description of Estimation Methods:
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Transistor Auto-Size: Transistor-level power estimation. Local buffers and
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wire lengths are automatically sized. This is the default estimation
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method.
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Transistor Specify-Size: Transistor-level power estimation. Local buffers
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and wire lengths are only inserted where specified by the user in the
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architecture file.
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Pin-Toggle: Dynamic power is calculated using enery-per-toggle of the PB
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input pins. Static power is absolute.
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C-Internal: Dynamic power is calculated using an internal equivalent
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capacitance for PB type. Static power is absolute.
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Absolute: Dynamic and static power are absolutes from the architecture file.
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Sum of Children: Power of PB is only the sum of all child PBs; interconnect
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between the PB and its children is ignored.
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Ignore: Power of PB is ignored.
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Component Power (W) %-Total %-Dynamic Method
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io 0 0 -nan Ignore
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clb 8.066e-05 0.2986 0.6884 Transistor Auto-Size
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Bufs/Wires 1.43e-05 0.05294 0.2804
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Interc: 8.462e-06 0.03133 0.542
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crossbar0 3.015e-06 0.01116 0.5188
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crossbar1 3.264e-06 0.01208 0.5568
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crossbar2 1.076e-06 0.003984 0.5484
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crossbar3 8.245e-07 0.003053 0.5364
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crossbar4 0 0 -nan
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crossbar5 0 0 -nan
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clks 0 0 -nan
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carry_in 2.821e-07 0.001045 0.6112
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fle 5.79e-05 0.2144 0.8106 Transistor Auto-Size
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Bufs/Wires 6.769e-06 0.02506 0.3446
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Mode:fle_phy 3.361e-05 0.1244 0.9139
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Interc: 0 0 -nan
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direct_clk 0 0 -nan
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mux1 0 0 -nan
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mux2 0 0 -nan
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frac_logic 3.388e-07 0.001254 0 Transistor Auto-Size
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Bufs/Wires 3.388e-07 0.001254 0
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Interc: 0 0 -nan
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mux1 0 0 -nan
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mux2 0 0 -nan
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frac_lut6 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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adder_phy 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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ff_phy 3.327e-05 0.1232 0.9232 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:n2_lut5 1.741e-05 0.06444 0.7925
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Interc: 0 0 -nan
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lut5inter 1.741e-05 0.06444 0.7925 Transistor Auto-Size
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Bufs/Wires 5.658e-07 0.002095 0.6977
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Interc: 0 0 -nan
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complete1 0 0 -nan
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ble5 1.684e-05 0.06235 0.7956 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:blut5 1.12e-05 0.04146 0.8091
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Interc: 0 0 -nan
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flut5 1.12e-05 0.04146 0.8091 Transistor Auto-Size
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Bufs/Wires 2.007e-07 0.000743 0.7628
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Interc: 2.646e-07 0.0009797 0.684
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mux1 2.646e-07 0.0009797 0.684
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lut5 1.655e-06 0.006127 0.2417 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:wire 0 0 -nan
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Interc: 0 0 -nan
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complete:lut5 0 0 -nan
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Mode:lut5 1.655e-06 0.006127 0.2417
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Interc: 0 0 -nan
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lut 1.655e-06 0.006127 0.2417 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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ff 9.079e-06 0.03361 0.9173 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:arithmetic 5.641e-06 0.02088 0.7689
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Interc: 0 0 -nan
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arithmetic 5.641e-06 0.02088 0.7689 Transistor Auto-Size
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Bufs/Wires 3.732e-07 0.001382 0.7081
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Interc: 1.399e-07 0.0005179 0.708
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sumout 1.399e-07 0.0005179 0.708
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lut4 7.913e-07 0.00293 0 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:wire 0 0 -nan
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Interc: 0 0 -nan
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complete:lut4 0 0 -nan
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Mode:lut4 7.913e-07 0.00293 0
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Interc: 0 0 -nan
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lut 7.913e-07 0.00293 0 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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adder 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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ff 4.336e-06 0.01606 0.9163 Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:n1_lut6 0 0 -nan
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Interc: 0 0 -nan
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ble6 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Interc: 0 0 -nan
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mux1 0 0 -nan
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lut6 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:wire 0 0 -nan
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Interc: 0 0 -nan
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complete:lut6 0 0 -nan
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Mode:lut6 0 0 -nan
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Interc: 0 0 -nan
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lut 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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ff 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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Mode:shift_register 1.134e-07 0.0004199 0.7826
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Interc: 0 0 -nan
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ble_shift 1.134e-07 0.0004199 0.7826 Transistor Auto-Size
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Bufs/Wires 1.134e-07 0.0004199 0.7826
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Interc: 0 0 -nan
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direct3 0 0 -nan
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ff 0 0 -nan Transistor Auto-Size
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Bufs/Wires 0 0 -nan
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