chungshien dd577e37e0 LUTRAM Support (#1595) ... * BRAM preload data - generic way to extract data from design * Add docs and support special __layout__ case * Add test * Fix warning * Change none-fabric to non-fabric * LUTRAM Support Phase 1 * Add Test * Add more protocol checking to enable LUTRAM feature * Move the config setting under config protocol * Revert any changes --------- Co-authored-by: chungshien-chai <chungshien.chai@gmail.com>		2024-04-19 14:46:38 -07:00
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figures	[doc] add figures for new options in tileable rr graph	2023-11-14 09:56:57 -08:00
addon_vpr_syntax.rst	[doc] comment on new options	2023-11-14 10:10:41 -08:00
annotate_vpr_arch.rst	[doc] format	2023-09-26 18:37:49 -07:00
circuit_library.rst	[Doc] More explanantion on the use of config_enable attribute for circuit ports	2022-02-23 15:53:58 -08:00
circuit_model_examples.rst	fix mux syntax in circuit_model_examples	2023-02-10 10:22:37 -07:00
config_protocol.rst	LUTRAM Support (#1595)	2024-04-19 14:46:38 -07:00
direct_interconnect.rst	clean-up documentation for a shallow hierarchy	2020-06-11 19:31:08 -06:00
fabric_key.rst	[Doc] Group file format documentation into a unified section	2021-01-19 19:44:44 -07:00
generality.rst	remove obselete vpr7 XML syntax from documentation	2020-07-15 11:13:47 -06:00
index.rst	add documentation for fabric key and reorganize command references	2020-06-12 16:15:16 -06:00
simulation_setting.rst	[Doc] Update documentation about the clock definition for programming clocks in simulation settings	2021-10-06 13:50:33 -07:00
technology_library.rst	update documentation about new XML syntax max width	2020-07-24 16:33:01 -06:00