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OpenFPGA/vpr7_x2p/vpr
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Baudouin Chauviere 9611576d6a Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00
..
Circuits rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
SRC support wired LUT in FPGA-SPICE and FPGA-Verilog 2018-11-15 15:57:49 -07:00
SpiceNetlists rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
VerilogNetlists rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
Makefile rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
arch.xml Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00
go.sh ReadMe modifications to add the beginning of the FPGA-SPICE tutorial 2018-09-27 09:33:39 -06:00
picorv_ace.act Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00
picorv_ace.blif Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00