tangxifan
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c6c3ef71f3
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adapt all the Verilog submodule writers and bring it onlien
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2020-02-16 13:35:18 -07:00 |
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tangxifan
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a88c4bc954
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add decode utils to libopenfpga and adapt local decoder writer in Verilog
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2020-02-16 12:21:59 -07:00 |
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tangxifan
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622c7826d1
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start transplanting fpga_verilog
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2020-02-15 15:03:00 -07:00 |
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tangxifan
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99f5a86b49
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bug fixed for routing annotation and routing net fix-up
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2020-02-06 12:54:55 -07:00 |
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tangxifan
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7d4b07421d
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finish XML parser and writer for pb_type annotation
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2020-01-26 15:54:49 -07:00 |
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tangxifan
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1cba141dd0
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add pb parser and support XML parsing for pb type name in full hiearchy
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2020-01-26 11:52:58 -07:00 |
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tangxifan
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3ace7f8ef7
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move generic data structures to openfpgautil library
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2020-01-16 13:26:55 -07:00 |
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tangxifan
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d232391250
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developed XML writer for circuit library and start porting functions to openfpgautil library
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2020-01-16 12:32:29 -07:00 |