tangxifan
|
71085247ac
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[core] code format
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2024-11-26 18:10:28 -08:00 |
tangxifan
|
10e3bf1165
|
[core] syntax
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2024-11-26 16:52:30 -08:00 |
tangxifan
|
9c9986c2ce
|
[core] enable force tap routing in clock router
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2024-11-26 16:41:03 -08:00 |
tangxifan
|
970faa0f17
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[core] add clock routing tap pins to bitstream annotation
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2024-11-26 16:23:08 -08:00 |
tangxifan
|
6e89943eb4
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[core] code format
|
2024-11-25 16:22:01 -08:00 |
tangxifan
|
8577513995
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[core] syntax
|
2024-11-25 15:37:39 -08:00 |
tangxifan
|
ed42c16f87
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[core] support bitstream setting to overwrite default mode bits
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2024-11-25 15:32:00 -08:00 |
tangxifan
|
d121538d5e
|
[core] code format
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2024-11-13 16:05:34 -08:00 |
tangxifan
|
07cbfa612e
|
[core] clang syntax
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2024-11-13 16:03:06 -08:00 |
tangxifan
|
0518058fb1
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[core] clang syntax
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2024-11-13 14:31:52 -08:00 |
tangxifan
|
2debc1e8da
|
[core] code format
|
2024-11-13 12:30:31 -08:00 |
tangxifan
|
c9d837936e
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[core] fixed clang syntax
|
2024-11-13 12:29:58 -08:00 |
tangxifan
|
6369787a50
|
[core] code format
|
2024-11-13 10:56:27 -08:00 |
tangxifan
|
7cea95b209
|
[core] syntax
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2024-11-13 10:53:55 -08:00 |
Jingrong Lin
|
f085299b8a
|
Merge branch 'master' into disable_repack_error_message
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2024-11-01 10:44:41 +08:00 |
Duck Deux
|
189f991ea7
|
Enable bitstream generation with flat routing
|
2024-10-31 01:51:52 -07:00 |
Lin
|
bd2cf17566
|
reformat code
|
2024-10-31 10:48:41 +08:00 |
Lin
|
539e37118a
|
add option reduce error to warning
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2024-10-31 10:47:26 +08:00 |
tangxifan
|
529a93bee9
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[core] resolve compiler warning
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2024-10-17 12:34:11 -07:00 |
tangxifan
|
225b4ff059
|
[core] code format
|
2024-10-17 12:13:59 -07:00 |
tangxifan
|
465e6a773e
|
[core] resolve API mismatches
|
2024-10-17 12:13:15 -07:00 |
Lin
|
fc5c0f6965
|
modified testcases
|
2024-10-09 17:41:01 +08:00 |
Lin
|
88e12a0afa
|
modified test cases & xsd file
|
2024-10-09 17:21:49 +08:00 |
Lin
|
4d8fae94a4
|
seperate xml parser and bin parser
|
2024-10-09 14:32:58 +08:00 |
Lin
|
f0a52bec18
|
auto generate capnp no compile error
|
2024-10-09 14:15:39 +08:00 |
Lin
|
03ccfa1b6c
|
reformat code
|
2024-10-08 18:05:33 +08:00 |
Lin
|
f0a9ca8b02
|
add xsd file and modified cmakelist
|
2024-10-08 16:30:09 +08:00 |
Jingrong Lin
|
be3546f7e3
|
Merge branch 'master' into bin_format
|
2024-10-08 13:28:53 +08:00 |
tangxifan
|
b9a0b1cdf8
|
[core] code format
|
2024-10-07 14:21:19 -07:00 |
tangxifan
|
4f96680e1f
|
[core] adapt to side var changes
|
2024-10-07 14:20:48 -07:00 |
Lin
|
bceb160ab8
|
reformat code
|
2024-09-29 13:20:49 +08:00 |
Lin
|
7d9a677534
|
changed file name
|
2024-09-29 13:17:13 +08:00 |
Lin
|
bddf693d7b
|
read bin ready
|
2024-09-29 12:22:02 +08:00 |
Lin
|
08ec3760e4
|
mod read bin
|
2024-09-29 10:46:50 +08:00 |
Lin
|
ed381692a7
|
read bin format mod (with bug)
|
2024-09-27 18:41:30 +08:00 |
Lin
|
59f1e4adc9
|
add read bin (with bugs)
|
2024-09-27 18:28:53 +08:00 |
Lin
|
1d6f9901bb
|
renamed file
|
2024-09-27 17:23:17 +08:00 |
Lin
|
ef18d04a3a
|
write bin function works now
|
2024-09-27 17:21:24 +08:00 |
Lin
|
3fcdc10d3a
|
write bin function no compile error
|
2024-09-27 11:34:57 +08:00 |
Lin
|
0cca4952bc
|
write bin format function (with bug)
|
2024-09-26 18:01:13 +08:00 |
Lin
|
5174b7a336
|
add capnp for unique blocks and add write bin function
|
2024-09-26 17:39:52 +08:00 |
tangxifan
|
c52610959c
|
[core] code format
|
2024-09-21 21:54:37 -07:00 |
tangxifan
|
f009180bbf
|
[core] refactor
|
2024-09-21 21:53:53 -07:00 |
tangxifan
|
415fd9a8fa
|
[core] code format
|
2024-09-21 21:39:30 -07:00 |
tangxifan
|
9e461284d0
|
[core] standardize API for clock network intermeidate drivers
|
2024-09-21 21:38:32 -07:00 |
tangxifan
|
4e85a6f414
|
[core] code format
|
2024-09-20 22:37:05 -07:00 |
tangxifan
|
33a253da3d
|
[core] fixed the bug
|
2024-09-20 22:20:41 -07:00 |
tangxifan
|
6551ca81e5
|
[core] debugging
|
2024-09-20 19:48:02 -07:00 |
tangxifan
|
2bb87ea278
|
[core] code format
|
2024-09-20 19:23:14 -07:00 |
tangxifan
|
f87e095558
|
[core] support intermediate driver in clock routing
|
2024-09-20 19:22:39 -07:00 |