tangxifan
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1b4e449179
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[OpenFPGA Tool] Critical bug fix for Verilog testbenches for memory bank and frame-based configuration protocol
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2020-09-25 21:05:20 -06:00 |
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tangxifan
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ad7422359d
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deploy compact constant values in Verilog codes
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2020-06-11 19:31:13 -06:00 |
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tangxifan
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8ec8ac4118
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bug fixed in flatten memory organization. Passed verification
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2020-06-11 19:31:12 -06:00 |
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tangxifan
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25e0583636
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add io location map data structure and start porting verilog testbench generator
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2020-02-26 17:10:57 -07:00 |
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tangxifan
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0d5292ad0d
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adapt verilog writer utils
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2020-02-15 23:26:59 -07:00 |