3 Commits

Author	SHA1	Message	Date
tangxifan	c7a4d25e35	[core] now all the commands can be optionally hidden	2023-01-07 11:36:10 -08:00
tangxifan	401b640852	[core] format	2023-01-06 17:50:47 -08:00
tangxifan	12134f4106	[core] now openfpga verilog commands follow templates	2023-01-06 17:48:00 -08:00