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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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3 Commits
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tangxifan
a3d070ac6f
[benchmark] Now the rst_on_lut benchmark has a comb output driven by rst
2022-09-12 10:43:21 -07:00
tangxifan
314f5395b4
[benchmark] fixed a bug which causes yosys failed
2022-09-09 17:04:59 -07:00
tangxifan
7a38c7dd18
[benchmark] add a new benchmark to test reset signal to drive both lut and ff
2022-09-09 16:42:55 -07:00