tangxifan
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0b49c22682
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[Tool] Now Verilog testbench generator support adding dedicated stimuli for reset signals from benchmarks
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2021-04-18 16:11:11 -06:00 |
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tangxifan
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6550ea3dfa
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[Tool] Rework pin constarint API to avoid expose raw data to judge for developers
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2021-04-18 12:02:49 -06:00 |
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tangxifan
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6e9b24f9bf
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[Tool] Patch the invalid pin constraint net name
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2021-04-17 19:56:30 -06:00 |
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tangxifan
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d95a1e2776
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[Tool] Encapulate search function in PinConstraint data structure
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2021-04-17 17:31:55 -06:00 |
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tangxifan
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0670c2de59
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[Tool] Deploy pin constraints to preconfig Verilog module generation
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2021-01-19 16:56:30 -07:00 |
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tangxifan
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ecd955124b
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[Lib] Add libpcf to CMakelist and bug fix
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2021-01-19 15:51:14 -07:00 |
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tangxifan
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52ac7826eb
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[Lib] Add a library of parser/writer for pin constraint file (PCF)
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2021-01-19 15:45:45 -07:00 |