3 Commits

Author	SHA1	Message	Date
tangxifan	e811f8bb21	plug in netlist manager and now the include_netlist appears in one unique file	2020-04-23 20:42:11 -06:00
tangxifan	60f40a9657	use constant module manager as much as possible in Verilog writer	2020-02-16 16:35:26 -07:00
tangxifan	c6c3ef71f3	adapt all the Verilog submodule writers and bring it onlien	2020-02-16 13:35:18 -07:00