4 Commits

Author	SHA1	Message	Date
tangxifan	6001da3a40	[Arch] Bug fix in tileable I/O arch example	2020-12-04 17:56:54 -07:00
tangxifan	1d0bdcfeca	[Arch] Simplify the grid layout modeling	2020-12-04 17:38:44 -07:00
tangxifan	1c3f625e41	[Arch] Force empty tiles at corners for tileable I/O arch example	2020-12-04 17:11:06 -07:00
tangxifan	186eb0f0a4	[Arch] Add tileable I/O architecture example	2020-12-04 15:59:39 -07:00