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riscv
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OpenFPGA
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tangxifan
13cd48c119
add support on packable/unpackable modes in VPR architecture
2020-04-06 16:07:49 -06:00
tangxifan
b09b051249
add all the test cases considering tileable, carry chain, direct connection and memory blocks
2020-03-27 13:58:35 -06:00