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OpenFPGA
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tangxifan
8b8096f3a8
[HDL] Bug fix in HDL modeling of multi-mode 16-bit DSP block
2021-04-24 14:57:09 -06:00
tangxifan
c44688739d
[HDL] Add verilog netlist for the fracturable 16-bit multiplier blocks
2021-04-23 22:12:26 -06:00