4 Commits

Author	SHA1	Message	Date
tangxifan	6645b70ae3	[Engine] Upgrade parser to support BL/WL protocols	2021-09-23 14:25:25 -07:00
tangxifan	e2b492f184	add circuit model tech binding	2020-07-13 20:35:10 -06:00
tangxifan	df3ae60954	add default configurable memory model set-up when reading openfpga architecture XML	2020-02-12 15:19:40 -07:00
tangxifan	ebe46d15a9	add XML parser, writer and linker for configuration protocol data structure	2020-01-18 21:19:20 -07:00