3 Commits

Author	SHA1	Message	Date
tangxifan	cff5b5cfc1	break the configuration testbench. This commit is to spot which modification leads to the problem	2020-06-11 19:31:10 -06:00
tangxifan	4a0e1cd908	add fabric bitstream data structure and deploy it to Verilog testbench generation	2020-06-11 19:31:10 -06:00
tangxifan	8c14cced84	start improve fabric bitstream database to support frame-based configuration protocol	2020-06-11 19:31:09 -06:00