5 Commits

Author	SHA1	Message	Date
tangxifan	e842150cc5	add lut module builder	2020-02-12 19:52:41 -07:00
tangxifan	fddd3c9463	add mux module builder	2020-02-12 19:45:14 -07:00
tangxifan	02d6256e95	pass simple test on pb_type annotation for frac_lut5 architecture	2020-01-30 21:39:44 -07:00
tangxifan	1651c9ca18	add binding between physical pb_type and circuit models	2020-01-28 16:03:02 -07:00
tangxifan	01c80b9126	add sample architecture to be used for Openfpga	2020-01-27 13:39:13 -07:00