tangxifan
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9b40e74e25
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[Doc] Add example circuit models for multipliers and update technical highlight with links to the examples
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2021-05-24 15:24:50 -06:00 |
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tangxifan
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21a18069a1
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[Doc] Add example circuit about dual-port RAMs to documentation; Updated technical highlights by providing links to the examples
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2021-05-24 14:50:55 -06:00 |
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tangxifan
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b6b98a75b8
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[Doc] Add example circuit model about multi-mode flip-flops; Separate data-path FF circuit model and configuration-chain FF circuit model;
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2021-05-24 13:03:40 -06:00 |
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tangxifan
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fb7d76545e
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[Doc] Patch the schematic of LUT circuit models to be consistent with netlists
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2021-03-15 11:40:09 -06:00 |
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tangxifan
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1c4dc9f74b
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[Doc] Update documentation about the super LUT feature
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2021-02-10 11:49:59 -07:00 |
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tangxifan
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226f6b8d6d
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[Doc] Update documentation about FF circuit models to show capability in modeling SCFFs
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2021-01-04 18:30:04 -07:00 |
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tangxifan
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4fe190fa7e
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[Doc] Bug fix in LUT circuit model documentation
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2020-12-04 14:44:27 -07:00 |
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tangxifan
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62e804215b
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[Doc] Add svg figures for LUT examples
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2020-11-26 12:35:39 -07:00 |
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tangxifan
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f6126d1ed6
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[Doc] Add illustrative example to diff between global ports definitions
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2020-11-12 09:24:39 -07:00 |
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tangxifan
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c2c384e24b
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[Doc] update documentation about memory bank definition
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2020-10-29 17:04:25 -06:00 |
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tangxifan
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639d57016b
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[Documentation] Update documentation about the multi-region configuration
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2020-09-29 15:55:42 -06:00 |
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tangxifan
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fe2ba7d50a
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update documentation for standalone configuration protocol
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2020-06-11 19:31:13 -06:00 |
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tangxifan
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de07712a3a
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update documentation about the frame-based configuration protocol
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2020-06-11 19:31:11 -06:00 |
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tangxifan
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c27d77a418
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clean-up documentation for a shallow hierarchy
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2020-06-11 19:31:08 -06:00 |