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OpenFPGA
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2 Commits

Author SHA1 Message Date
tangxifan de8425874c use user defined critical path delay in SDC generation 2020-02-28 11:24:39 -07:00
tangxifan 092e10afda bring pnr sdc generator online and fixed minor bugs in bitstream writing 2020-02-28 11:14:50 -07:00