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update openfpga architecture README for power-gating

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tangxifan 2020-07-22 21:55:59 -06:00
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openfpga_flow/openfpga_arch/README.md
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@ -23,5 +23,6 @@ Note that an OpenFPGA architecture can be applied to multiple VPR architecture f
- stdcell: If circuit designs are built with standard cells only - stdcell: If circuit designs are built with standard cells only
- tree\_mux: If routing multiplexers are built with a tree-like structure - tree\_mux: If routing multiplexers are built with a tree-like structure
- <feature_size>: The technology node which the delay numbers are extracted from. - <feature_size>: The technology node which the delay numbers are extracted from.
- powergate : The FPGA has power-gating techniques applied. If not defined, there is no power-gating.
Other features are used in naming should be listed here. Other features are used in naming should be listed here.