[FPGA-SPICE] Optimize the print-out of SPICE ports
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@ -70,10 +70,21 @@ void print_spice_comment(std::fstream& fp,
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/************************************************
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* Generate a string for a port in SPICE format
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* If the pin id is zero, e.g., A[0], the option
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* 'omit_pin_zero' may be turned on for compact port
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* print-out, e.g., A
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***********************************************/
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std::string generate_spice_port(const BasicPort& port) {
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std::string generate_spice_port(const BasicPort& port,
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const bool& omit_pin_zero) {
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VTR_ASSERT(1 == port.get_width());
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std::string ret = port.get_name();
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if ((true == omit_pin_zero)
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&& (0 == port.get_lsb())) {
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return ret;
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}
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ret += "[";
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ret += std::to_string(port.get_lsb());
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ret += "]";
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@ -119,7 +130,15 @@ void print_spice_subckt_definition(std::fstream& fp,
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BasicPort port_pin(port.get_name(), pin, pin);
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fp << generate_spice_port(port_pin);
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/* For single-bit port,
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* we can print the port name directly
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*/
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bool omit_pin_zero = false;
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if ((1 == port.pins().size())
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&& (0 == pin)) {
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omit_pin_zero = true;
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}
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fp << generate_spice_port(port_pin, omit_pin_zero);
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/* Increase the counter */
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pin_cnt++;
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@ -39,7 +39,8 @@ void print_spice_include_netlist(std::fstream& fp,
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void print_spice_comment(std::fstream& fp,
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const std::string& comment);
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std::string generate_spice_port(const BasicPort& port);
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std::string generate_spice_port(const BasicPort& port,
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const bool& omit_pin_zero = false);
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void print_spice_subckt_definition(std::fstream& fp,
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const ModuleManager& module_manager, const ModuleId& module_id);
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