[Tool] Add bitstream setting file to openfpga library
This commit is contained in:
tangxifan
parent
04594cb7ab
commit
f102e84497
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#include "vtr_assert.h"
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#include "bitstream_setting.h"
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/* namespace openfpga begins */
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namespace openfpga {
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/************************************************************************
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* Member functions for class BitstreamSetting
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***********************************************************************/
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/************************************************************************
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* Public Accessors : aggregates
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***********************************************************************/
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BitstreamSetting::bitstream_pb_type_setting_range BitstreamSetting::pb_type_settings() const {
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return vtr::make_range(pb_type_setting_ids_.begin(), pb_type_setting_ids_.end());
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}
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/************************************************************************
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* Constructors
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***********************************************************************/
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BitstreamSetting::BitstreamSetting() {
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return;
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}
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/************************************************************************
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* Public Accessors
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***********************************************************************/
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std::string BitstreamSetting::pb_type_name(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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VTR_ASSERT(true == valid_bitstream_pb_type_setting_id(pb_type_setting_id));
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return pb_type_names_[pb_type_setting_id];
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}
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std::vector<std::string> BitstreamSetting::parent_pb_type_names(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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VTR_ASSERT(true == valid_bitstream_pb_type_setting_id(pb_type_setting_id));
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return parent_pb_type_names_[pb_type_setting_id];
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}
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std::vector<std::string> BitstreamSetting::parent_mode_names(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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VTR_ASSERT(true == valid_bitstream_pb_type_setting_id(pb_type_setting_id));
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return parent_mode_names_[pb_type_setting_id];
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}
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std::string BitstreamSetting::pb_type_bitstream_source(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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VTR_ASSERT(true == valid_bitstream_pb_type_setting_id(pb_type_setting_id));
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return pb_type_bitstream_sources_[pb_type_setting_id];
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}
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std::string BitstreamSetting::pb_type_bitstream_content(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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VTR_ASSERT(true == valid_bitstream_pb_type_setting_id(pb_type_setting_id));
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return pb_type_bitstream_contents_[pb_type_setting_id];
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}
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/************************************************************************
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* Public Mutators
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***********************************************************************/
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BitstreamPbTypeSettingId BitstreamSetting::add_bitstream_pb_type_setting(const std::string& pb_type_name,
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const std::vector<std::string>& parent_pb_type_names,
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const std::vector<std::string>& parent_mode_names,
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const std::string& bitstream_source,
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const std::string& bitstream_content) {
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BitstreamPbTypeSettingId pb_type_setting_id = BitstreamPbTypeSettingId(pb_type_setting_ids_.size());
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pb_type_setting_ids_.push_back(pb_type_setting_id);
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pb_type_names_.push_back(pb_type_name);
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parent_pb_type_names_.push_back(parent_pb_type_names);
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parent_mode_names_.push_back(parent_mode_names);
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pb_type_bitstream_sources_.push_back(bitstream_source);
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pb_type_bitstream_contents_.push_back(bitstream_content);
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return pb_type_setting_id;
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}
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/************************************************************************
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* Public Validators
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***********************************************************************/
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bool BitstreamSetting::valid_bitstream_pb_type_setting_id(const BitstreamPbTypeSettingId& pb_type_setting_id) const {
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return ( size_t(pb_type_setting_id) < pb_type_setting_ids_.size() ) && ( pb_type_setting_id == pb_type_setting_ids_[pb_type_setting_id] );
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}
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} /* namespace openfpga ends */
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@ -0,0 +1,61 @@
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#ifndef BITSTREAM_SETTING_H
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#define BITSTREAM_SETTING_H
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/********************************************************************
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* This file include the declaration of simulation settings
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* which are used by OpenFPGA
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*******************************************************************/
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#include <string>
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#include "vtr_vector.h"
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#include "bitstream_setting_fwd.h"
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/* namespace openfpga begins */
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namespace openfpga {
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/********************************************************************
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* A data structure to describe bitstream settings
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*
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* Typical usage:
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* --------------
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* // Create an empty bitstream setting
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* BitstreamSetting bitstream_setting;
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* // call your builder for bitstream_setting
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*
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*******************************************************************/
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class BitstreamSetting {
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public: /* Types */
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typedef vtr::vector<BitstreamPbTypeSettingId, BitstreamPbTypeSettingId>::const_iterator bitstream_pb_type_setting_iterator;
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/* Create range */
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typedef vtr::Range<bitstream_pb_type_setting_iterator> bitstream_pb_type_setting_range;
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public: /* Constructors */
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BitstreamSetting();
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public: /* Accessors: aggregates */
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bitstream_pb_type_setting_range pb_type_settings() const;
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public: /* Public Accessors */
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std::string pb_type_name(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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std::vector<std::string> parent_pb_type_names(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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std::vector<std::string> parent_mode_names(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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std::string pb_type_bitstream_source(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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std::string pb_type_bitstream_content(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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public: /* Public Mutators */
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BitstreamPbTypeSettingId add_bitstream_pb_type_setting(const std::string& pb_type_name,
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const std::vector<std::string>& parent_pb_type_names,
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const std::vector<std::string>& parent_mode_names,
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const std::string& bitstream_source,
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const std::string& bitstream_content);
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public: /* Public Validators */
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bool valid_bitstream_pb_type_setting_id(const BitstreamPbTypeSettingId& pb_type_setting_id) const;
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private: /* Internal data */
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vtr::vector<BitstreamPbTypeSettingId, BitstreamPbTypeSettingId> pb_type_setting_ids_;
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vtr::vector<BitstreamPbTypeSettingId, std::string> pb_type_names_;
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vtr::vector<BitstreamPbTypeSettingId, std::vector<std::string>> parent_pb_type_names_;
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vtr::vector<BitstreamPbTypeSettingId, std::vector<std::string>> parent_mode_names_;
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vtr::vector<BitstreamPbTypeSettingId, std::string> pb_type_bitstream_sources_;
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vtr::vector<BitstreamPbTypeSettingId, std::string> pb_type_bitstream_contents_;
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};
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} /* namespace openfpga ends */
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#endif
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@ -0,0 +1,22 @@
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/************************************************************************
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* A header file for BitstreamSetting class, including critical data declaration
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* Please include this file only for using any BitstreamSetting data structure
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* Refer to bitstream_setting.h for more details
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***********************************************************************/
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/************************************************************************
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* Create strong id for the pb_type annotation in Bitstream setting to avoid illegal type casting
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***********************************************************************/
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#ifndef BITSTREAM_SETTING_FWD_H
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#define BITSTREAM_SETTING_FWD_H
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#include "vtr_strong_id.h"
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struct bitstream_pb_type_setting_id_tag;
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typedef vtr::StrongId<bitstream_pb_type_setting_id_tag> BitstreamPbTypeSettingId;
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/* Short declaration of class */
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class BitstreamSetting;
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#endif
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@ -6,7 +6,6 @@
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#include "circuit_library.h"
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#include "technology_library.h"
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#include "simulation_setting.h"
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#include "config_protocol.h"
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#include "arch_direct.h"
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#include "tile_annotation.h"
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/********************************************************************
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* This file includes the top-level function of this library
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* which reads an XML modeling OpenFPGA architecture to the associated
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* data structures
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*******************************************************************/
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#include <string>
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/* Headers from pugi XML library */
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#include "pugixml.hpp"
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#include "pugixml_util.hpp"
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/* Headers from vtr util library */
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#include "vtr_assert.h"
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/* Headers from openfpga util library */
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#include "openfpga_pb_parser.h"
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/* Headers from libarchfpga */
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#include "arch_error.h"
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#include "read_xml_util.h"
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#include "read_xml_bitstream_setting.h"
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/********************************************************************
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* Parse XML description for a pb_type annotation under a <pb_type> XML node
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*******************************************************************/
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static
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void read_xml_bitstream_pb_type_setting(pugi::xml_node& xml_pb_type,
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const pugiutil::loc_data& loc_data,
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openfpga::BitstreamSetting& bitstream_setting) {
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const std::string& name_attr = get_attribute(xml_pb_type, "name", loc_data).as_string();
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const std::string& source_attr = get_attribute(xml_pb_type, "source", loc_data).as_string();
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const std::string& content_attr = get_attribute(xml_pb_type, "content", loc_data).as_string();
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/* Parse the attributes for operating pb_type */
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openfpga::PbParser operating_pb_parser(name_attr);
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/* Add to bitstream setting */
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bitstream_setting.add_bitstream_pb_type_setting(operating_pb_parser.leaf(),
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operating_pb_parser.parents(),
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operating_pb_parser.modes(),
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source_attr,
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content_attr);
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}
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/********************************************************************
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* Parse XML codes about <openfpga_bitstream_setting> to an object
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*******************************************************************/
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openfpga::BitstreamSetting read_xml_bitstream_setting(pugi::xml_node& Node,
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const pugiutil::loc_data& loc_data) {
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openfpga::BitstreamSetting bitstream_setting;
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/* Iterate over the children under this node,
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* each child should be named after <pb_type>
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*/
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for (pugi::xml_node xml_pb_type : Node.children()) {
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/* Error out if the XML child has an invalid name! */
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if (xml_pb_type.name() != std::string("pb_type")) {
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bad_tag(xml_pb_type, loc_data, Node, {"pb_type"});
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}
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read_xml_bitstream_pb_type_setting(xml_pb_type, loc_data, bitstream_setting);
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}
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return bitstream_setting;
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}
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#ifndef READ_XML_BITSTREAM_SETTING_H
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#define READ_XML_BITSTREAM_SETTING_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "pugixml_util.hpp"
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#include "pugixml.hpp"
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#include "bitstream_setting.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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openfpga::BitstreamSetting read_xml_bitstream_setting(pugi::xml_node& Node,
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const pugiutil::loc_data& loc_data);
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#endif
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#include "read_xml_routing_circuit.h"
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#include "read_xml_tile_annotation.h"
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#include "read_xml_pb_type_annotation.h"
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#include "read_xml_bitstream_setting.h"
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#include "read_xml_openfpga_arch.h"
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#include "openfpga_arch_linker.h"
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@ -149,3 +150,34 @@ openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* si
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return openfpga_sim_setting;
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}
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/********************************************************************
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* Top-level function to parse an XML file and load data to bitstream settings
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*******************************************************************/
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openfpga::BitstreamSetting read_xml_openfpga_bitstream_settings(const char* bitstream_setting_file_name) {
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vtr::ScopedStartFinishTimer timer("Read OpenFPGA bitstream settings");
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openfpga::BitstreamSetting openfpga_bitstream_setting;
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pugi::xml_node Next;
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/* Parse the file */
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pugi::xml_document doc;
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pugiutil::loc_data loc_data;
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try {
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loc_data = pugiutil::load_xml(doc, bitstream_setting_file_name);
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/* Second node should be <openfpga_simulation_setting> */
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auto xml_bitstream_settings = get_single_child(doc, "openfpga_bitstream_setting", loc_data);
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/* Parse simulation settings to data structure */
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openfpga_bitstream_setting = read_xml_bitstream_setting(xml_bitstream_settings, loc_data);
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} catch (pugiutil::XmlError& e) {
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archfpga_throw(bitstream_setting_file_name, e.line(),
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"%s", e.what());
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}
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return openfpga_bitstream_setting;
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}
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*******************************************************************/
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#include <string>
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#include "openfpga_arch.h"
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#include "simulation_setting.h"
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#include "bitstream_setting.h"
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/********************************************************************
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* Function declaration
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@ -14,4 +16,6 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name);
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openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* sim_setting_file_name);
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openfpga::BitstreamSetting read_xml_openfpga_bitstream_settings(const char* bitstream_setting_file_name);
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#endif
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/********************************************************************
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* This file includes functions that outputs a bitstream setting to XML format
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*******************************************************************/
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/* Headers from system goes first */
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#include <string>
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#include <algorithm>
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/* Headers from vtr util library */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "openfpga_digest.h"
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/* Headers from readarchopenfpga library */
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#include "write_xml_utils.h"
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#include "write_xml_bitstream_setting.h"
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/********************************************************************
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* Generate the full hierarchy name for a pb_type in bitstream setting
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*******************************************************************/
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static
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std::string generate_bitstream_setting_pb_type_hierarchy_name(const openfpga::BitstreamSetting& bitstream_setting,
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const BitstreamPbTypeSettingId& bitstream_pb_type_setting_id) {
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/* Iterate over the parent_pb_type and modes names, they should well match */
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VTR_ASSERT_SAFE(bitstream_setting.parent_pb_type_names(bitstream_pb_type_setting_id).size() == bitstream_setting.parent_mode_names(bitstream_pb_type_setting_id).size());
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std::string hie_name;
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for (size_t i = 0 ; i < bitstream_setting.parent_pb_type_names(bitstream_pb_type_setting_id).size(); ++i) {
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hie_name += bitstream_setting.parent_pb_type_names(bitstream_pb_type_setting_id)[i];
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hie_name += std::string("[");
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hie_name += bitstream_setting.parent_mode_names(bitstream_pb_type_setting_id)[i];
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hie_name += std::string("]");
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hie_name += std::string(".");
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}
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/* Add the leaf pb_type */
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hie_name += bitstream_setting.pb_type_name(bitstream_pb_type_setting_id);
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return hie_name;
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}
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/********************************************************************
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* A writer to output a bitstream pb_type setting to XML format
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*******************************************************************/
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static
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void write_xml_bitstream_pb_type_setting(std::fstream& fp,
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const char* fname,
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const openfpga::BitstreamSetting& bitstream_setting,
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const BitstreamPbTypeSettingId& bitstream_pb_type_setting_id) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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fp << "\t\t" << "<pb_type";
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/* Generate the full hierarchy name of the pb_type */
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write_xml_attribute(fp, "name", generate_bitstream_setting_pb_type_hierarchy_name(bitstream_setting, bitstream_pb_type_setting_id).c_str());
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write_xml_attribute(fp, "source", bitstream_setting.pb_type_bitstream_source(bitstream_pb_type_setting_id).c_str());
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write_xml_attribute(fp, "content", bitstream_setting.pb_type_bitstream_content(bitstream_pb_type_setting_id).c_str());
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fp << "/>" << "\n";
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}
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/********************************************************************
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* A writer to output a bitstream setting to XML format
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*******************************************************************/
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void write_xml_bitstream_setting(std::fstream& fp,
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const char* fname,
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const openfpga::BitstreamSetting& bitstream_setting) {
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the root node <openfpga_bitstream_setting>
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*/
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fp << "<openfpga_bitstream_setting>" << "\n";
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/* Write clock settings */
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for (const auto& bitstream_pb_type_setting_id : bitstream_setting.pb_type_settings()) {
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write_xml_bitstream_pb_type_setting(fp, fname, bitstream_setting, bitstream_pb_type_setting_id);
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}
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/* Write the root node <openfpga_bitstream_setting> */
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fp << "</openfpga_bitstream_setting>" << "\n";
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}
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#ifndef WRITE_XML_BITSTREAM_SETTING_H
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#define WRITE_XML_BITSTREAM_SETTING_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <fstream>
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#include "bitstream_setting.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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void write_xml_bitstream_setting(std::fstream& fp,
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const char* fname,
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const openfpga::BitstreamSetting& bitstream_setting);
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#endif
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/********************************************************************
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* Unit test functions to validate the correctness of
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* 1. parser of data structures
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* 2. writer of data structures
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*******************************************************************/
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/* Headers from vtrutils */
|
||||
#include "vtr_assert.h"
|
||||
#include "vtr_log.h"
|
||||
|
||||
/* Headers from readarchopenfpga */
|
||||
#include "read_xml_openfpga_arch.h"
|
||||
#include "write_xml_openfpga_arch.h"
|
||||
|
||||
int main(int argc, const char** argv) {
|
||||
/* Ensure we have only one or two argument */
|
||||
VTR_ASSERT((2 == argc) || (3 == argc));
|
||||
|
||||
/* Parse the simulation settings from an XML file */
|
||||
const openfpga::BitstreamSetting& openfpga_sim_setting = read_xml_openfpga_bitstream_settings(argv[1]);
|
||||
VTR_LOG("Parsed bitstream settings from XML %s.\n",
|
||||
argv[1]);
|
||||
|
||||
/* Output the simulation settings to an XML file
|
||||
* This is optional only used when there is a second argument
|
||||
*/
|
||||
if (3 <= argc) {
|
||||
write_xml_openfpga_bitstream_settings(argv[2], openfpga_bitstream_setting);
|
||||
VTR_LOG("Echo the OpenFPGA bitstream settings to an XML file: %s.\n",
|
||||
argv[2]);
|
||||
}
|
||||
}
|
||||
|
|
@ -4,6 +4,7 @@
|
|||
#include <vector>
|
||||
#include "vpr_context.h"
|
||||
#include "openfpga_arch.h"
|
||||
#include "simulation_setting.h"
|
||||
#include "vpr_netlist_annotation.h"
|
||||
#include "vpr_device_annotation.h"
|
||||
#include "vpr_clustering_annotation.h"
|
||||
|
|
|
|||
Loading…
Reference in New Issue