Add Class for RRSwtichBlock and plug-in to replace the old t_sb
This commit is contained in:
tangxifan
parent
b4c97f86a3
commit
efbc454cdd
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@ -13,7 +13,7 @@ project("libarchfpga")
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#Collect the source files
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file(GLOB_RECURSE EXEC_SOURCES SRC/main.c)
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file(GLOB_RECURSE LIB_SOURCES SRC/*.c SRC/*/*.c)
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file(GLOB_RECURSE LIB_SOURCES SRC/*.c SRC/*/*.c SRC/*.cpp SRC/*/*.cpp)
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file(GLOB_RECURSE LIB_HEADERS SRC/*.h SRC/*/*.h)
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files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
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@ -33,6 +33,7 @@
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/* END */
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/* SPICE model Support: Xifan TANG*/
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#include "spice_types.h"
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#include "sides.h"
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/* END */
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typedef struct s_clock_arch t_clock_arch;
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@ -63,10 +64,11 @@ enum e_interconnect {
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COMPLETE_INTERC = 1, DIRECT_INTERC = 2, MUX_INTERC = 3
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};
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/* Orientations. */
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/* Orientations.
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enum e_side {
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TOP = 0, RIGHT = 1, BOTTOM = 2, LEFT = 3
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};
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*/
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/* pin location distributions */
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enum e_pin_location_distr {
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@ -0,0 +1,42 @@
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#ifndef SIDES_H
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#define SIDES_H
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/* Define a class for the sides of a physical block in FPGA architecture
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* Basically, each block has four sides :
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* TOP, RIGHT, BOTTOM, LEFT
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* This class aims to provide a easy proctol for manipulating a side
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*/
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#include <cstddef>
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/* Orientations. */
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enum e_side {
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TOP = 0,
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RIGHT = 1,
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BOTTOM = 2,
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LEFT = 3,
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NUM_SIDES
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};
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class Side {
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public: /* Constructor */
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Side(enum e_side side);
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Side();
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Side(size_t side);
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public: /* Accessors */
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enum e_side get_side() const;
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enum e_side get_opposite() const;
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enum e_side get_rotate_clockwise() const;
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enum e_side get_rotate_counterclockwise() const;
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bool validate() const;
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size_t to_size_t() const;
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public: /* Mutators */
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void set_side(size_t side);
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void set_side(enum e_side side);
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void set_opposite();
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void rotate_clockwise();
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void rotate_counterclockwise();
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private: /* internal data */
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enum e_side side_;
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};
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#endif
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@ -101,7 +101,7 @@ void RRChan::reserve_node(size_t node_size) {
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/* add a node to the array */
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void RRChan::add_node(t_rr_node* node, size_t node_segment) {
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/* resize the array if needed, node is placed in the sequence of node->ptc_num */
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if (node->ptc_num + 1 > nodes_.size()) {
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if (size_t(node->ptc_num + 1) > nodes_.size()) {
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nodes_.resize(node->ptc_num + 1); /* resize to the maximum */
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node_segments_.resize(node->ptc_num + 1); /* resize to the maximum */
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}
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@ -146,9 +146,9 @@ RRChan DeviceRRChan::get_module(t_rr_type chan_type, size_t module_id) const {
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if (CHANX == chan_type) {
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return chanx_modules_[module_id];
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} else if (CHANY == chan_type) {
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return chany_modules_[module_id];
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}
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assert (CHANY == chan_type);
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return chany_modules_[module_id];
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}
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RRChan DeviceRRChan::get_module_with_coordinator(t_rr_type chan_type, size_t x, size_t y) const {
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@ -163,9 +163,9 @@ size_t DeviceRRChan::get_num_modules(t_rr_type chan_type) const {
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if (CHANX == chan_type) {
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return chanx_modules_.size();
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} else if (CHANY == chan_type) {
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return chany_modules_.size();
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}
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assert (CHANY == chan_type);
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return chany_modules_.size();
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}
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size_t DeviceRRChan::get_module_id(t_rr_type chan_type, size_t x, size_t y) const {
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@ -173,9 +173,9 @@ size_t DeviceRRChan::get_module_id(t_rr_type chan_type, size_t x, size_t y) cons
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if (CHANX == chan_type) {
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return chanx_module_ids_[x][y];
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} else if (CHANY == chan_type) {
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return chany_module_ids_[x][y];
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}
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assert (CHANY == chan_type);
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return chany_module_ids_[x][y];
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}
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void DeviceRRChan::init_module_ids(size_t device_width, size_t device_height) {
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@ -266,17 +266,17 @@ bool DeviceRRChan::valid_coordinator(t_rr_type chan_type, size_t x, size_t y) co
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assert(valid_chan_type(chan_type));
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if (CHANX == chan_type) {
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if ( (0 > x) || (x > chanx_module_ids_.size() - 1 )) {
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if (x > chanx_module_ids_.size() - 1 ) {
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return false;
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}
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if ( (0 > y) || (y > chanx_module_ids_[x].size() - 1) ) {
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if (y > chanx_module_ids_[x].size() - 1) {
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return false;
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}
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} else if (CHANY == chan_type) {
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if ( (0 > x) && (x > chany_module_ids_.size() - 1) ) {
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if (x > chany_module_ids_.size() - 1) {
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return false;
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}
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if ( (0 > y) && (y > chany_module_ids_[x].size() - 1) ) {
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if (y > chany_module_ids_[x].size() - 1) {
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return false;
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}
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}
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@ -301,3 +301,367 @@ bool DeviceRRChan::valid_module_id(t_rr_type chan_type, size_t module_id) const
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return false;
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}
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/* Member Functions of Class RRSwitchBlock*/
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/* Accessors */
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/* Get the number of sides of this SB */
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size_t RRSwitchBlock::get_num_sides() const {
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assert (validate_num_sides());
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return chan_rr_node_direction_.size();
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}
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/* Get the number of routing tracks on a side */
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size_t RRSwitchBlock::get_chan_width(enum e_side side) const {
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Side side_manager(side);
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assert(side_manager.validate());
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return chan_rr_node_[side_manager.to_size_t()].size();
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}
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/* Get the direction of a rr_node at a given side and track_id */
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enum PORTS RRSwitchBlock::get_chan_node_direction(enum e_side side, size_t track_id) const {
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Side side_manager(side);
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assert(side_manager.validate());
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/* Ensure the side is valid in the context of this switch block */
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assert( validate_side(side) );
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/* Ensure the track is valid in the context of this switch block at a specific side */
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assert( validate_track_id(side, track_id) );
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return chan_rr_node_direction_[side_manager.to_size_t()][track_id];
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}
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/* get a rr_node at a given side and track_id */
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t_rr_node* RRSwitchBlock::get_chan_node(enum e_side side, size_t track_id) const {
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Side side_manager(side);
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assert(side_manager.validate());
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/* Ensure the side is valid in the context of this switch block */
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assert( validate_side(side) );
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/* Ensure the track is valid in the context of this switch block at a specific side */
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assert( validate_track_id(side, track_id) );
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return chan_rr_node_[side_manager.to_size_t()][track_id];
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}
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/* Get the number of IPIN rr_nodes on a side */
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size_t RRSwitchBlock::get_num_ipin_rr_nodes(enum e_side side) const {
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Side side_manager(side);
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assert(side_manager.validate());
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return ipin_rr_node_[side_manager.to_size_t()].size();
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}
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/* Get the number of OPIN rr_nodes on a side */
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size_t RRSwitchBlock::get_num_opin_rr_nodes(enum e_side side) const {
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Side side_manager(side);
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assert(side_manager.validate());
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return opin_rr_node_[side_manager.to_size_t()].size();
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}
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/* Get the node index in the array, return -1 if not found */
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int RRSwitchBlock::get_node_index(t_rr_node* node,
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enum e_side node_side,
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enum PORTS node_direction) const {
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size_t cnt;
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int ret;
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Side side_manager(node_side);
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cnt = 0;
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ret = -1;
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/* Depending on the type of rr_node, we search different arrays */
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switch (node->type) {
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case CHANX:
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case CHANY:
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for (size_t inode = 0; inode < get_chan_width(node_side); ++inode) {
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if ((node == chan_rr_node_[side_manager.to_size_t()][inode])
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/* Check if direction meets specification */
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&&(node_direction == chan_rr_node_direction_[side_manager.to_size_t()][inode])) {
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cnt++;
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ret = inode;
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}
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}
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break;
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case IPIN:
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for (size_t inode = 0; inode < get_num_ipin_rr_nodes(node_side); ++inode) {
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if (node == ipin_rr_node_[side_manager.to_size_t()][inode]) {
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cnt++;
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ret = inode;
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}
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}
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break;
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case OPIN:
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for (size_t inode = 0; inode < get_num_opin_rr_nodes(node_side); ++inode) {
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if (node == opin_rr_node_[side_manager.to_size_t()][inode]) {
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cnt++;
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ret = inode;
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}
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}
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break;
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default:
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vpr_printf(TIO_MESSAGE_ERROR, "(File:%s, [LINE%d])Invalid cur_rr_node type! Should be [CHANX|CHANY|IPIN|OPIN]\n", __FILE__, __LINE__);
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exit(1);
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}
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assert((0 == cnt)||(1 == cnt));
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return ret; /* Return an invalid value: nonthing is found*/
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}
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/* Check if the node exist in the opposite side of this Switch Block */
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bool RRSwitchBlock::is_node_exist_opposite_side(t_rr_node* node,
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enum e_side node_side) const {
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Side side_manager(node_side);
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int index;
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assert((CHANX == node->type) || (CHANY == node->type));
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/* See if we can find the same src_rr_node in the opposite chan_side
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* if there is one, it means a shorted wire across the SB
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*/
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index = get_node_index(node, side_manager.get_opposite(), IN_PORT);
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if (-1 != index) {
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return true;
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}
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return false;
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}
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/* Get the side of a node in this SB */
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void RRSwitchBlock::get_node_side_and_index(t_rr_node* node,
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enum PORTS node_direction,
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enum e_side* node_side,
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int* node_index) const {
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size_t side;
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Side side_manager;
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/* Count the number of existence of cur_rr_node in cur_sb_info
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* It could happen that same cur_rr_node appears on different sides of a SB
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* For example, a routing track go vertically across the SB.
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* Then its corresponding rr_node appears on both TOP and BOTTOM sides of this SB.
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* We need to ensure that the found rr_node has the same direction as user want.
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* By specifying the direction of rr_node, There should be only one rr_node can satisfy!
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*/
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for (side = 0; side < get_num_sides(); ++side) {
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side_manager.set_side(side);
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(*node_index) = get_node_index(node, side_manager.get_side(), node_direction);
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if (-1 != (*node_index)) {
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break;
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}
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}
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if (side == get_num_sides()) {
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/* we find nothing, return NUM_SIDES, and a OPEN node (-1) */
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(*node_side) = NUM_SIDES;
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assert(-1 == (*node_index));
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return;
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}
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(*node_side) = side_manager.get_side();
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assert(-1 != (*node_index));
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return;
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}
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size_t RRSwitchBlock::get_num_reserved_conf_bits() const {
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return num_reserved_conf_bits_;
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}
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size_t RRSwitchBlock::get_num_conf_bits() const {
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return num_conf_bits_;
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}
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/* Check if the node imply a short connection inside the SB, which happens to long wires across a FPGA fabric */
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bool RRSwitchBlock::is_node_imply_short_connection(t_rr_node* src_node) const {
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assert((CHANX == src_node->type) || (CHANY == src_node->type));
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for (size_t inode = 0; inode < size_t(src_node->num_drive_rr_nodes); ++inode) {
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enum e_side side;
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int index;
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get_node_side_and_index(src_node->drive_rr_nodes[inode], IN_PORT, &side, &index);
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/* We need to be sure that drive_rr_node is part of the SB */
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if (((-1 == index) || (NUM_SIDES == side))
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&& ((CHANX == src_node->drive_rr_nodes[inode]->type) || (CHANY == src_node->drive_rr_nodes[inode]->type))) {
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return true;
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}
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}
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return false;
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}
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/* check if the candidate SB is a mirror of the current one */
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/* Idenify mirror Switch blocks
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* Check each two switch blocks:
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* 1. Number of channel/opin/ipin rr_nodes are same
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* For channel rr_nodes
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* 2. check if their track_ids (ptc_num) are same
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* 3. Check if the switches (ids) are same
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* For opin/ipin rr_nodes,
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* 4. check if their parent type_descriptors same,
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* 5. check if pin class id and pin id are same
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* If all above are satisfied, the two switch blocks are mirrors!
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*/
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bool RRSwitchBlock::is_mirror(RRSwitchBlock& cand) const {
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/* check the numbers of sides */
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if (get_num_sides() != cand.get_num_sides()) {
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return false;
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}
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/* check the numbers/directionality of channel rr_nodes */
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for (size_t side = 0; side < get_num_sides(); ++side) {
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Side side_manager(side);
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/* Ensure we have the same channel width on this side */
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if (get_chan_width(side_manager.get_side()) != cand.get_chan_width(side_manager.get_side())) {
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return false;
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}
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for (size_t itrack = 0; itrack < get_chan_width(side_manager.get_side()); ++itrack) {
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/* Check the directionality of each node */
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if (get_chan_node_direction(side_manager.get_side(), itrack) != cand.get_chan_node_direction(side_manager.get_side(), itrack)) {
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return false;
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}
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/* Check the track_id of each node */
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if (get_chan_node(side_manager.get_side(), itrack)->ptc_num != cand.get_chan_node(side_manager.get_side(), itrack)->ptc_num) {
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return false;
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}
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/* For OUT_PORT rr_node, we need to check fan-in */
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if (OUT_PORT != get_chan_node_direction(side_manager.get_side(), itrack)) {
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continue; /* skip IN_PORT */
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}
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if (false == is_node_mirror(cand, side_manager.get_side(), itrack)) {
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return false;
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}
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}
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}
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/* check the numbers of opin_rr_nodes */
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for (size_t side = 0; side < get_num_sides(); ++side) {
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Side side_manager(side);
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if (get_num_ipin_rr_nodes(side_manager.get_side()) != cand.get_num_ipin_rr_nodes(side_manager.get_side())) {
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return false;
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}
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}
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/* Make sure the number of conf bits are the same */
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if ( ( get_num_conf_bits() != cand.get_num_conf_bits() )
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|| ( get_num_reserved_conf_bits() != cand.get_num_reserved_conf_bits() ) ) {
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return false;
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}
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return true;
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}
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/* Internal functions */
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/* check if two rr_nodes have a similar set of drive_rr_nodes
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* for each drive_rr_node:
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* 1. CHANX or CHANY: should have the same side and index
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* 2. OPIN or IPIN: should have the same side and index
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* 3. each drive_rr_switch should be the same
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*/
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bool RRSwitchBlock::is_node_mirror(RRSwitchBlock& cand,
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enum e_side node_side,
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size_t track_id) const {
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/* Ensure rr_nodes are either the output of short-connection or multiplexer */
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t_rr_node* node = this->get_chan_node(node_side, track_id);
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t_rr_node* cand_node = cand.get_chan_node(node_side, track_id);
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bool is_short_conkt = this->is_node_imply_short_connection(node);
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if (is_short_conkt != cand.is_node_imply_short_connection(cand_node)) {
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return false;
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}
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/* Find the driving rr_node in this sb */
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if (true == is_short_conkt) {
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/* Ensure we have the same track id for the driving nodes */
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if ( this->is_node_exist_opposite_side(node, node_side)
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!= cand.is_node_exist_opposite_side(cand_node, node_side)) {
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return false;
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}
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} else { /* check driving rr_nodes */
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if ( node->num_drive_rr_nodes != cand_node->num_drive_rr_nodes ) {
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return false;
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}
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for (size_t inode = 0; inode < size_t(node->num_drive_rr_nodes); ++inode) {
|
||||
/* node type should be the same */
|
||||
if ( node->drive_rr_nodes[inode]->type
|
||||
!= cand_node->drive_rr_nodes[inode]->type) {
|
||||
return false;
|
||||
}
|
||||
/* switch type should be the same */
|
||||
if ( node->drive_switches[inode]
|
||||
!= cand_node->drive_switches[inode]) {
|
||||
return false;
|
||||
}
|
||||
int src_node_id, des_node_id;
|
||||
enum e_side src_node_side, des_node_side;
|
||||
this->get_node_side_and_index(node->drive_rr_nodes[inode], OUT_PORT, &src_node_side, &src_node_id);
|
||||
cand.get_node_side_and_index(cand_node->drive_rr_nodes[inode], OUT_PORT, &des_node_side, &des_node_id);
|
||||
if (src_node_id != des_node_id) {
|
||||
return false;
|
||||
}
|
||||
if (src_node_side != des_node_side) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Validate if the number of sides are consistent among internal data arrays ! */
|
||||
bool RRSwitchBlock::validate_num_sides() const {
|
||||
size_t num_sides = chan_rr_node_direction_.size();
|
||||
|
||||
if ( num_sides != chan_rr_node_.size() ) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if ( num_sides != ipin_rr_node_.size() ) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if ( num_sides != ipin_rr_node_grid_side_.size() ) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if ( num_sides != opin_rr_node_.size() ) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if ( num_sides != opin_rr_node_grid_side_.size() ) {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Check if the side valid in the context: does the switch block have the side? */
|
||||
bool RRSwitchBlock::validate_side(enum e_side side) const {
|
||||
Side side_manager(side);
|
||||
if ( side_manager.to_size_t() < get_num_sides() ) {
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Check the track_id is valid for chan_rr_node_ and chan_rr_node_direction_ */
|
||||
bool RRSwitchBlock::validate_track_id(enum e_side side, size_t track_id) const {
|
||||
Side side_manager(side);
|
||||
|
||||
if (false == validate_side(side)) {
|
||||
return false;
|
||||
}
|
||||
if ( track_id < chan_rr_node_[side_manager.to_size_t()].size() ) {
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,7 +18,22 @@
|
|||
|
||||
/* RRChan coordinator class */
|
||||
|
||||
/* Object of a channel in a routing resource graph */
|
||||
/* Object of a routing channel in a routing resource graph
|
||||
* This is a collection of rr_nodes, which may be replaced with RRNodeId in new RRGraph
|
||||
* Each routing channel is categorized in terms of directionality,
|
||||
* being either X-direction or Y-direction
|
||||
* ------------- ------
|
||||
* | | | |
|
||||
* | | | Y |
|
||||
* | CLB | | Chan |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* ------------- ------
|
||||
* -------------
|
||||
* | X |
|
||||
* | Channel |
|
||||
* -------------
|
||||
*/
|
||||
class RRChan {
|
||||
public: /* Accessors */
|
||||
t_rr_type get_type() const;
|
||||
|
|
@ -75,5 +90,65 @@ class DeviceRRChan {
|
|||
std::vector<RRChan> chany_modules_; /* Detailed internal structure of each unique module */
|
||||
};
|
||||
|
||||
/* Object Switch Block
|
||||
* This is a collection of rr_nodes, which may be replaced with RRNodeId in new RRGraph
|
||||
* TOP SIDE
|
||||
* ---------------------------------
|
||||
* | OPIN_NODE CHAN_NODES OPIN_NODES |
|
||||
* | |
|
||||
* | OPIN_NODES OPIN_NODES |
|
||||
* | |
|
||||
* LEFT SIDE | Switch Block | RIGHT SIDE
|
||||
* | |
|
||||
* | CHAN_NODES CHAN_NODES |
|
||||
* | |
|
||||
* | OPIN_NODES OPIN_NODES |
|
||||
* | |
|
||||
* | OPIN_NODE CHAN_NODES OPIN_NODES |
|
||||
* ---------------------------------
|
||||
* BOTTOM SIDE
|
||||
* num_sides: number of sides of this switch block
|
||||
* chan_rr_node: a collection of rr_nodes as routing tracks locating at each side of the Switch block <0..num_sides-1><0..chan_width-1>
|
||||
* chan_rr_node_direction: Indicate if this rr_node is an input or an output of the Switch block <0..num_sides-1><0..chan_width-1>
|
||||
* ipin_rr_node: a collection of rr_nodes as IPIN of a GRID locating at each side of the Switch block <0..num_sides-1><0..num_ipin_rr_nodes-1>
|
||||
* ipin_rr_node_grid_side: specify the side of the input pins on which side of a GRID <0..num_sides-1><0..num_ipin_rr_nodes-1>
|
||||
* opin_rr_node: a collection of rr_nodes as OPIN of a GRID locating at each side of the Switch block <0..num_sides-1><0..num_opin_rr_nodes-1>
|
||||
* opin_rr_node_grid_side: specify the side of the output pins on which side of a GRID <0..num_sides-1><0..num_opin_rr_nodes-1>
|
||||
* num_reserved_conf_bits: number of reserved configuration bits this switch block requires (mainly due to RRAM-based multiplexers)
|
||||
* num_conf_bits: number of configuration bits this switch block requires
|
||||
*/
|
||||
class RRSwitchBlock {
|
||||
public: /* Contructors */
|
||||
public: /* Accessors */
|
||||
size_t get_num_sides() const; /* Get the number of sides of this SB */
|
||||
size_t get_chan_width(enum e_side side) const; /* Get the number of routing tracks on a side */
|
||||
enum PORTS get_chan_node_direction(enum e_side side, size_t track_id) const; /* Get the direction of a rr_node at a given side and track_id */
|
||||
t_rr_node* get_chan_node(enum e_side side, size_t track_id) const; /* get a rr_node at a given side and track_id */
|
||||
size_t get_num_ipin_rr_nodes(enum e_side side) const; /* Get the number of IPIN rr_nodes on a side */
|
||||
size_t get_num_opin_rr_nodes(enum e_side side) const; /* Get the number of OPIN rr_nodes on a side */
|
||||
int get_node_index(t_rr_node* node, enum e_side node_side, enum PORTS node_direction) const; /* Get the node index in the array, return -1 if not found */
|
||||
void get_node_side_and_index(t_rr_node* node, enum PORTS node_direction, enum e_side* node_side, int* node_index) const; /* Given a rr_node, try to find its side and index in the Switch block */
|
||||
bool is_node_exist_opposite_side(t_rr_node* node, enum e_side node_side) const; /* Check if the node exist in the opposite side of this Switch Block */
|
||||
size_t get_num_reserved_conf_bits() const;
|
||||
size_t get_num_conf_bits() const;
|
||||
bool is_node_imply_short_connection(t_rr_node* src_node) const; /* Check if the node imply a short connection inside the SB, which happens to long wires across a FPGA fabric */
|
||||
bool is_mirror(RRSwitchBlock& cand) const; /* check if the candidate SB is a mirror of the current one */
|
||||
public: /* Mutators */
|
||||
private: /* internal functions */
|
||||
bool is_node_mirror (RRSwitchBlock& cand, enum e_side node_side, size_t track_id) const;
|
||||
bool validate_num_sides() const;
|
||||
bool validate_side(enum e_side side) const;
|
||||
bool validate_track_id(enum e_side side, size_t track_id) const;
|
||||
private: /* Internal Data */
|
||||
std::vector< std::vector<enum PORTS> > chan_rr_node_direction_;
|
||||
std::vector< std::vector<t_rr_node*> > chan_rr_node_;
|
||||
std::vector< std::vector<t_rr_node*> > ipin_rr_node_;
|
||||
std::vector< std::vector<enum e_side> > ipin_rr_node_grid_side_;
|
||||
std::vector< std::vector<t_rr_node*> > opin_rr_node_;
|
||||
std::vector< std::vector<enum e_side> > opin_rr_node_grid_side_;
|
||||
size_t num_reserved_conf_bits_;
|
||||
size_t num_conf_bits_;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue