[Flow] Enable flatten for dff-related yosys scripts

2021-10-30 15:12:34 -07:00 · 2021-10-30 15:12:34 -07:00 · e6cc3c4942
parent ad5cce0ae8
commit e6cc3c4942
3 changed files with 3 additions and 0 deletions
--- a/openfpga_flow/misc/ys_tmpl_yosys_vpr_dff_flow.ys
+++ b/openfpga_flow/misc/ys_tmpl_yosys_vpr_dff_flow.ys
@ -10,6 +10,7 @@ proc
 techmap -D NO_LUT -map ${YOSYS_DFF_MAP_VERILOG}

 # Synthesis
+flatten
 opt_expr
 opt_clean
 check
--- a/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys
+++ b/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys
@ -8,6 +8,7 @@ proc
 techmap -D NO_LUT -map +/adff2dff.v

 # Synthesis
+flatten
 opt_expr
 opt_clean
 check
--- a/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow_with_rewrite.ys
+++ b/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow_with_rewrite.ys
@ -8,6 +8,7 @@ proc
 techmap -D NO_LUT -map +/adff2dff.v

 # Synthesis
+flatten
 opt_expr
 opt_clean
 check