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[Test] Rename to pin constraint to comply with libpcf requirement

This commit is contained in:
tangxifan 2021-01-19 15:52:51 -07:00
parent ecd955124b
commit e17a5cbbf2
1 changed files with 4 additions and 4 deletions
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8
openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_4clock/config/fpga_port_nets.xml → openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_4clock/config/pin_constraints.xml
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@ -1,9 +1,9 @@
<fpga_port_nets>
<pin_constraints>
<!-- For a given .blif file, we want to assign
- the clk0 signal to the clk[0] port of the FPGA fabric
- the clk1 signal to the clk[1] port of the FPGA fabric
-->
<port net="clk0" fpga="clk[0]"/>
<port net="clk1" fpga="clk[1]"/>
</fpga_port_nets>
<set_io pin="clk[0]" net="clk0"/>
<set_io pin="clk[1]" net="clk1"/>
</pin_constraints>