[Benchmark] Add a new micro benchmark to test fracturable LUTs

openfpga_flow/benchmarks/micro_benchmark/and2_or2/and2_or2.act

@@ -0,0 +1,4 @@
+a 0.5 0.5
+b 0.5 0.5
+c 0.25 0.25
+d 0.25 0.25

openfpga_flow/benchmarks/micro_benchmark/and2_or2/and2_or2.blif

@@ -0,0 +1,11 @@
+.model and2_or2
+.inputs a b
+.outputs c d
+
+.names a b c
+11 1
+
+.names a b d
+00 1
+
+.end

openfpga_flow/benchmarks/micro_benchmark/and2_or2/and2_or2.v

@@ -0,0 +1,22 @@
+/////////////////////////////////////////
+//  Functionality: 2-input AND + 2-input OR 
+//                 This benchmark is designed to test fracturable LUTs
+//  Author:        Xifan Tang
+////////////////////////////////////////
+`timescale 1ns / 1ps
+
+module and2_or2(
+  a,
+  b,
+  c,
+  d);
+
+input wire a;
+input wire b;
+output wire c;
+output wire d;
+
+assign c = a & b;
+assign d = a | b;
+
+endmodule