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[Engine] Add programming shift register clock to internal global port data structure

This commit is contained in:
tangxifan 2021-10-01 11:05:31 -07:00
parent dda147e234
commit cf96d9ff01
1 changed files with 1 additions and 0 deletions
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openfpga/src/fabric/build_fabric_global_port_info.cpp
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@ -53,6 +53,7 @@ FabricGlobalPortInfo build_fabric_global_port_info(const ModuleManager& module_m
fabric_global_port_info.set_global_port_is_reset(fabric_port, circuit_lib.port_is_reset(global_port));
fabric_global_port_info.set_global_port_is_set(fabric_port, circuit_lib.port_is_set(global_port));
fabric_global_port_info.set_global_port_is_prog(fabric_port, circuit_lib.port_is_prog(global_port));
fabric_global_port_info.set_global_port_is_shift_register(fabric_port, circuit_lib.port_is_shift_register(global_port));
fabric_global_port_info.set_global_port_is_config_enable(fabric_port, circuit_lib.port_is_config_enable(global_port));
fabric_global_port_info.set_global_port_default_value(fabric_port, circuit_lib.port_default_value(global_port));
}