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Format and update doc

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chungshien-chai 2024-07-28 00:02:20 -07:00
parent 933155b08f
commit cbe9a46f95
2 changed files with 11 additions and 5 deletions
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14
docs/source/manual/file_formats/bitstream_setting.rst
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@ -16,7 +16,9 @@ This can define a hard-coded bitstream for a reconfigurable resource in FPGA fab
<non_fabric name="<string>" file="<string>"> <non_fabric name="<string>" file="<string>">
<pb name="<string>" type="<string>" content="<string>"/> <pb name="<string>" type="<string>" content="<string>"/>
</non_fabric> </non_fabric>
<bit value="<0 or 1>" path="<string>"/> <overwrite_bitstream>
<bit value="<0 or 1>" path="<string>"/>
</overwrite_bitstream>
</openfpga_bitstream_setting> </openfpga_bitstream_setting>
pb_type-related Settings pb_type-related Settings
@ -117,12 +119,16 @@ The following syntax are applicable to the XML definition tagged by ``non_fabric
The content of the ``pb_type`` data to be extracted. For example, ``content=".param INIT_i"`` means that the data will be extracted from the ``.param INIT_i`` line defined under the ``.blif model``. The content of the ``pb_type`` data to be extracted. For example, ``content=".param INIT_i"`` means that the data will be extracted from the ``.param INIT_i`` line defined under the ``.blif model``.
bit-related Settings overwrite_bitstream-related Settings
^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^
This is to allow user to set particular bit using full path in the hierarchy of FPGA fabric This is to allow user to set value of a list of bits which is represented using full path in the hierarchy of FPGA fabric
The following syntax are applicable to the XML definition tagged by ``bit`` in bitstream setting files. This ``overwrite_bitstream`` settings has the highest priority than loading any external bitstream file
Each bit to overwrite is represented by one ``bit`` child node/tag
The following syntax are applicable to the XML definition tagged by ``bit`` node under ``overwrite_bitstream`` setting.
.. option:: value="<0 or 1>" .. option:: value="<0 or 1>"

2
openfpga/src/base/openfpga_basic.cpp
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@ -68,7 +68,7 @@ int call_external_command(const Command& cmd,
VTR_LOG("Processer is not available"); VTR_LOG("Processer is not available");
return CMD_EXEC_FATAL_ERROR; return CMD_EXEC_FATAL_ERROR;
} }
int status = system(cmd_ss.c_str()); int status = system(cmd_ss.c_str());
if (status & 0xFF) { if (status & 0xFF) {
// First 8 bits are system signals // First 8 bits are system signals